table of contents
COUGAR(1) | ALLIANCE USER COMMANDS | COUGAR(1) |
NAME¶
cougar - Hierarchical netlist extractorSYNOPSIS¶
cougar [ -v ] [ -c ] [ -f ] [ -t ] [ -ar ] [ -ac ] input_name [ output_name ]ORIGIN¶
This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Université Pierre et Marie CURIE, in Paris, France.DESCRIPTION¶
Lynx changed its name to Cougar during May 2002 in order to avoid name conflict with the famous text-mode Web browser. Cougar is a hierarchical layout extractor. It builds a netlist of interconnections from a symbolic layout view. The input argument is the name of the symbolic layout cell to be extracted, using as input format the one selected by the MBK_IN_PH(1) environment variable. If output is present, the resulting netlist will be given this name. If no output is given, then input will also be the generated netlist name. The output format is specified by the MBK_OUT_LO(1) environment variable.- POLY
- 100
- ALU1
- 50
- ALU2
- 25
OPTIONS¶
Cougar checks the two basic ALLIANCE rules regarding connector names:If two physical connectors are connected to the same net,
they must have the same name.
If two physical connectors have the same name, they must be internally connected
to the same net.
- -t
- Notifies a transistor level extraction, the symbolic layout cell is flattened to transistor layout before extraction.
- -f
- The symbolic layout cell is flattened to the catalog level before extraction. Use "man catal" for detail on the catalog file. If the catalog is empty, or doesn't exist, the netlist is an interconection of transistors, if it isn't, the netlist is an interconection of gates or blocks whose names are defined in the catalog.
- -v
- Verbose mode on. Each step of the extraction is displayed on the standard output, along with some statistics.
- -c
- Generates a core file representing the conflictuel net, when cougar detects two external connectors with different names on the same signal, or when it finds two external connectors having the same name but not internally connected to the same net, or when it cannot correctly extract an L shaped transistor.
- -ac
- Extract capacitance to ground on losig.
- -ar
- Extract interconnect resistance and capacitance to ground. Value of resistance foreach layer can be changed in the RDS file.
EXAMPLES¶
prompt> cougar -v amd2901Gives a logical netlist of the chip amd2901, for one
hierarchical level, using verbose mode. This would be typically used to verify
the work of the ring(1) router, in conjunction with lvx on the
specificated netlist and the extracted one.
prompt> cat $MBK_WORK_LIB/$MBK_CATAL_NAME a2_y a2p_y . . prompt> cougar -f amd2901
Gives a logical netlist of the chip amd2901, after a
flatten operation stopping on the cells specified in the catalog ( the
standard cell library in our case ).
prompt> cougar -t amd2901
Gives a logical netlist of the amd2901 chip at the
transistor level. This is useful with yagle(1), to retrieve logical
equations from a layout.
SEE ALSO¶
al(5), MBK_CATA_LIB(1), MBK_WORK_LIB(1), MBK_CATAL_NAME(1), MBK_IN_PH(1), catal(5), RDS_TECHNO_NAME(1).BUG REPORT¶
This tool is under development at the ASIM department of the LIP6 laboratory.October 1, 1997 | ASIM/LIP6 |