.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.47.15. .TH LLVM-RANLIB "1" "May 2020" "llvm-ranlib 6.0" "User Commands" .SH NAME llvm-ranlib \- manual page for llvm-ranlib 6.0 .SH DESCRIPTION OVERVIEW: LLVM Archiver (llvm\-ar) .IP This program archives bitcode files into single libraries .PP USAGE: llvm\-ranlib [options] [relpos] [count] [members]... .PP OPTIONS: .PP General options: .HP \fB\-M\fR \- .HP \fB\-aarch64\-neon\-syntax\fR \- Choose style of NEON code to emit from AArch64 backend: .TP =generic \- Emit generic NEON assembly .TP =apple \- Emit Apple\-style NEON assembly .HP \fB\-amdgpu\-dump\-hsa\-metadata\fR \- Dump AMDGPU HSA Metadata .HP \fB\-amdgpu\-enable\-merge\-m0\fR \- Merge and hoist M0 initializations .HP \fB\-amdgpu\-sdwa\-peephole\fR \- Enable SDWA peepholer .HP \fB\-amdgpu\-spill\-sgpr\-to\-smem\fR \- Use scalar stores to spill SGPRs if supported by subtarget .HP \fB\-amdgpu\-verify\-hsa\-metadata\fR \- Verify AMDGPU HSA Metadata .HP \fB\-amdgpu\-vgpr\-index\-mode\fR \- Use GPR indexing mode instead of movrel for vector indexing .HP \fB\-arm\-add\-build\-attributes\fR \- .HP \fB\-arm\-implicit\-it\fR \- Allow conditional instructions outdside of an IT block .TP =always \- Accept in both ISAs, emit implicit ITs in Thumb .TP =never \- Warn in ARM, reject in Thumb .TP =arm \- Accept in ARM, reject in Thumb .TP =thumb \- Warn in ARM, emit implicit ITs in Thumb .TP \fB\-atomic\-counter\-update\-promoted\fR \- Do counter update using atomic fetch add for promoted counters only .HP \fB\-bounds\-checking\-single\-trap\fR \- Use one trap block per function .HP \fB\-color\fR \- use colored syntax highlighting (default=autodetect) .HP \fB\-cost\-kind\fR \- Target cost kind .TP =throughput \- Reciprocal throughput .TP =latency \- Instruction latency .TP =code\-size \- Code size .HP \fB\-cvp\-dont\-process\-adds\fR \- .HP \fB\-debug\-counter\fR \- Comma separated list of debug counter skip and count .TP =predicateinfo\-rename \- Controls which variables are renamed with predicateinfo .TP =instcombine\-visit \- Controls which instructions are visited .TP =newgvn\-vn \- Controls which instructions are value numbered .TP =newgvn\-phi \- Controls which instructions we create phi of ops for .TP =falkor\-hwpf \- Controls which tag collisions are avoided .HP \fB\-do\-counter\-promotion\fR \- Do counter register promotion .HP \fB\-emscripten\-cxx\-exceptions\-whitelist=\fR \- The list of function names in which Emscripten\-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_WHITELIST options) .HP \fB\-enable\-emscripten\-cxx\-exceptions\fR \- WebAssembly Emscripten\-style exception handling .HP \fB\-enable\-emscripten\-sjlj\fR \- WebAssembly Emscripten\-style setjmp/longjmp handling .HP \fB\-enable\-load\-pre\fR \- .HP \fB\-enable\-name\-compression\fR \- Enable name string compression .HP \fB\-enable\-packed\-inlinable\-literals\fR \- Enable packed inlinable literals (v2f16, v2i16) .HP \fB\-enable\-si\-insert\-waitcnts\fR \- Use new waitcnt insertion pass .HP \fB\-expensive\-combines\fR \- Enable expensive instruction combines .HP \fB\-format\fR \- Archive format to create .TP =default \- default .TP =gnu \- gnu .TP =darwin \- darwin .TP =bsd \- bsd .TP \fB\-gpsize=\fR \- Global Pointer Addressing Size. The default size is 8. .HP \fB\-hash\-based\-counter\-split\fR \- Rename counter variable of a comdat function based on cfg hash .HP \fB\-import\-all\-index\fR \- Import all external functions in index. .HP \fB\-instcombine\-maxarray\-size=\fR \- Maximum array size considered when doing a combine .HP \fB\-internalize\-public\-api\-file=\fR \- A file containing list of symbol names to preserve .HP \fB\-internalize\-public\-api\-list=\fR \- A list of symbol names to preserve .HP \fB\-iterative\-counter\-promotion\fR \- Allow counter promotion across the whole loop nest. .HP \fB\-lto\-pass\-remarks\-output=\fR \- Output filename for pass remarks .HP \fB\-max\-counter\-promotions=\fR \- Max number of allowed counter promotions .HP \fB\-max\-counter\-promotions\-per\-loop=\fR \- Max number counter promotions per loop to avoid increasing register pressure too much .HP \fB\-memop\-size\-large=\fR \- Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling. .HP \fB\-memop\-size\-range=\fR \- Set the range of size in memory intrinsic calls to be profiled precisely, in a format of : .HP \fB\-merror\-missing\-parenthesis\fR \- Error for missing parenthesis around predicate registers .HP \fB\-merror\-noncontigious\-register\fR \- Error for register names that aren't contigious .HP \fB\-mhvx\fR \- Enable Hexagon Vector eXtensions .TP =v60 \- Build for HVX v60 .TP =v62 \- Build for HVX v62 .TP =v65 \- Build for HVX v65 .TP = \- .HP \fB\-mips\-compact\-branches\fR \- MIPS Specific: Compact branch policy. .TP =never \- Do not use compact branches if possible. .TP =optimal \- Use compact branches where appropiate (default). .TP =always \- Always use compact branches if possible. .HP \fB\-mips16\-constant\-islands\fR \- Enable mips16 constant islands. .HP \fB\-mips16\-hard\-float\fR \- Enable mips16 hard float. .HP \fB\-mno\-compound\fR \- Disable looking for compound instructions for Hexagon .HP \fB\-mno\-fixup\fR \- Disable fixing up resolved relocations for Hexagon .HP \fB\-mno\-ldc1\-sdc1\fR \- Expand double precision loads and stores to their single precision counterparts .HP \fB\-mno\-pairing\fR \- Disable looking for duplex instructions for Hexagon .HP \fB\-mwarn\-missing\-parenthesis\fR \- Warn for missing parenthesis around predicate registers .HP \fB\-mwarn\-noncontigious\-register\fR \- Warn for register names that arent contigious .HP \fB\-mwarn\-sign\-mismatch\fR \- Warn for mismatching a signed and unsigned value .HP \fB\-no\-discriminators\fR \- Disable generation of discriminator information. .HP \fB\-nvptx\-sched4reg\fR \- NVPTX Specific: schedule for register pressue .HP \fB\-plugin=\fR \- plugin (ignored for compatibility .HP \fB\-print\-module\-scope\fR \- When printing IR for print\-[before|after]{\-all} always print a module IR .HP \fB\-r600\-ir\-structurize\fR \- Use StructurizeCFG IR pass .HP \fB\-rdf\-dump\fR \- .HP \fB\-rdf\-limit=\fR \- .HP \fB\-safepoint\-ir\-verifier\-print\-only\fR \- .HP \fB\-sample\-profile\-check\-record\-coverage=\fR \- Emit a warning if less than N% of records in the input profile are matched to the IR. .HP \fB\-sample\-profile\-check\-sample\-coverage=\fR \- Emit a warning if less than N% of samples in the input profile are matched to the IR. .HP \fB\-sample\-profile\-inline\-hot\-threshold=\fR \- Inlined functions that account for more than N% of all samples collected in the parent function, will be inlined again. .HP \fB\-sample\-profile\-max\-propagate\-iterations=\fR \- Maximum number of iterations to go through when propagating sample block/edge weights through the CFG. .TP \fB\-speculative\-counter\-promotion\-max\-exiting=\fR \- The max number of exiting blocks of a loop to allow speculative counter promotion .TP \fB\-speculative\-counter\-promotion\-to\-loop\fR \- When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region. .HP \fB\-summary\-file=\fR \- The summary file to use for function importing. .HP \fB\-threads=\fR \- .HP \fB\-unfold\-element\-atomic\-memcpy\-max\-elements=\fR \- Maximum number of elements in atomic memcpy the optimizer is allowed to unfold .HP \fB\-verify\-region\-info\fR \- Verify region info (time consuming) .HP \fB\-vp\-counters\-per\-site=\fR \- The average number of profile counters allocated per value profiling site. .HP \fB\-vp\-static\-alloc\fR \- Do static counter allocation for value profiler .PP Generic Options: .HP \fB\-help\fR \- Display available options (\fB\-help\-hidden\fR for more) .HP \fB\-help\-list\fR \- Display list of available options (\fB\-help\-list\-hidden\fR for more) .HP \fB\-version\fR \- Display the version of this program .SS "OPERATIONS:" .TP d[NsS] \- delete file(s) from the archive .TP m[abiSs] \- move file(s) in the archive .TP p[kN] \- print file(s) found in the archive .TP q[ufsS] \- quick append file(s) to the archive .TP r[abfiuRsS] \- replace or insert file(s) into the archive .TP t \- display contents of archive .TP x[No] \- extract file(s) from the archive .SS "MODIFIERS (operation specific):" .IP [a] \- put file(s) after [relpos] [b] \- put file(s) before [relpos] (same as [i]) [i] \- put file(s) before [relpos] (same as [b]) [o] \- preserve original dates [s] \- create an archive index (cf. ranlib) [S] \- do not build a symbol table [T] \- create a thin archive [u] \- update only files newer than archive contents .SS "MODIFIERS (generic):" .IP [c] \- do not warn if the library had to be created [v] \- be verbose about actions taken