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.\" ========================================================================
.\"
.IX Title "Netlist::Interface 3pm"
.TH Netlist::Interface 3pm 2024-03-07 "perl v5.38.2" "User Contributed Perl Documentation"
.\" For nroff, turn off justification. Always turn off hyphenation; it makes
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.nh
.SH NAME
Verilog::Netlist::Interface \- Interface within a Verilog Netlist
.SH SYNOPSIS
.IX Header "SYNOPSIS"
.Vb 1
\& use Verilog::Netlist;
\&
\& ...
\& my $interface = $netlist\->find_interface(\*(Aqname\*(Aq);
\& my $cell = $self\->find_cell(\*(Aqname\*(Aq)
\& my $port = $self\->find_port(\*(Aqname\*(Aq)
\& my $net = $self\->find_net(\*(Aqname\*(Aq)
.Ve
.SH DESCRIPTION
.IX Header "DESCRIPTION"
A Verilog::Netlist::Interface object is created by Verilog::Netlist for
every interface in the design.
.SH ACCESSORS
.IX Header "ACCESSORS"
See also Verilog::Netlist::Subclass for additional accessors and methods.
.ie n .IP $self\->comment 4
.el .IP \f(CW$self\fR\->comment 4
.IX Item "$self->comment"
Returns any comments following the definition. keep_comments=>1 must be
passed to Verilog::Netlist::new for comments to be retained.
.ie n .IP $self\->find_port_by_index 4
.el .IP \f(CW$self\fR\->find_port_by_index 4
.IX Item "$self->find_port_by_index"
Returns the port name associated with the given index.
.ie n .IP $self\->modports 4
.el .IP \f(CW$self\fR\->modports 4
.IX Item "$self->modports"
Returns list of references to Verilog::Netlist::ModPort in the interface.
.ie n .IP $self\->modports_sorted 4
.el .IP \f(CW$self\fR\->modports_sorted 4
.IX Item "$self->modports_sorted"
Returns list of references to Verilog::Netlist::ModPort in the interface
sorted by name.
.ie n .IP $self\->name 4
.el .IP \f(CW$self\fR\->name 4
.IX Item "$self->name"
The name of the interface.
.ie n .IP $self\->netlist 4
.el .IP \f(CW$self\fR\->netlist 4
.IX Item "$self->netlist"
Reference to the Verilog::Netlist the interface is under.
.ie n .IP $self\->nets 4
.el .IP \f(CW$self\fR\->nets 4
.IX Item "$self->nets"
Returns list of references to Verilog::Netlist::Net in the interface.
.ie n .IP $self\->nets_sorted 4
.el .IP \f(CW$self\fR\->nets_sorted 4
.IX Item "$self->nets_sorted"
Returns list of name sorted references to Verilog::Netlist::Net in the
interface.
.ie n .IP $self\->nets_and_ports_sorted 4
.el .IP \f(CW$self\fR\->nets_and_ports_sorted 4
.IX Item "$self->nets_and_ports_sorted"
Returns list of name sorted references to Verilog::Netlist::Net and
Verilog::Netlist::Port in the interface.
.ie n .IP $self\->ports 4
.el .IP \f(CW$self\fR\->ports 4
.IX Item "$self->ports"
Returns list of references to Verilog::Netlist::Port in the interface.
.ie n .IP $self\->ports_ordered 4
.el .IP \f(CW$self\fR\->ports_ordered 4
.IX Item "$self->ports_ordered"
Returns list of references to Verilog::Netlist::Port in the interface
sorted by pin number.
.ie n .IP $self\->ports_sorted 4
.el .IP \f(CW$self\fR\->ports_sorted 4
.IX Item "$self->ports_sorted"
Returns list of references to Verilog::Netlist::Port in the interface
sorted by name.
.SH "MEMBER FUNCTIONS"
.IX Header "MEMBER FUNCTIONS"
See also Verilog::Netlist::Subclass for additional accessors and methods.
.ie n .IP $self\->find_net(\fIname\fR) 4
.el .IP \f(CW$self\fR\->find_net(\fIname\fR) 4
.IX Item "$self->find_net(name)"
Returns Verilog::Netlist::Net matching given name.
.ie n .IP $self\->level 4
.el .IP \f(CW$self\fR\->level 4
.IX Item "$self->level"
Returns the reverse depth of this interface with respect to other modules
and interfaces. See also Netlist's modules_sorted_level.
.ie n .IP $self\->lint 4
.el .IP \f(CW$self\fR\->lint 4
.IX Item "$self->lint"
Checks the interface for errors.
.ie n .IP $self\->link 4
.el .IP \f(CW$self\fR\->link 4
.IX Item "$self->link"
Creates interconnections between this interface and other interfaces.
.ie n .IP $self\->new_net 4
.el .IP \f(CW$self\fR\->new_net 4
.IX Item "$self->new_net"
Creates a new Verilog::Netlist::Net.
.ie n .IP $self\->dump 4
.el .IP \f(CW$self\fR\->dump 4
.IX Item "$self->dump"
Prints debugging information for this interface.
.ie n .IP $self\->verilog_text 4
.el .IP \f(CW$self\fR\->verilog_text 4
.IX Item "$self->verilog_text"
Returns verilog code which represents this interface. Returned as an array
that must be joined together to form the final text string. The netlist
must be already \->link'ed for this to work correctly.
.SH DISTRIBUTION
.IX Header "DISTRIBUTION"
Verilog-Perl is part of the free Verilog EDA
software tool suite. The latest version is available from CPAN and from
.
.PP
Copyright 2000\-2024 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.
.SH AUTHORS
.IX Header "AUTHORS"
Wilson Snyder
.SH "SEE ALSO"
.IX Header "SEE ALSO"
Verilog-Perl,
Verilog::Netlist::Subclass
Verilog::Netlist