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CLANGD(1) User Commands CLANGD(1)


clangd - manual page for clangd 8


OVERVIEW: clangd is a language server that provides IDE-like features to editors.

It should be used via an editor plugin rather than invoked directly. For more information, see:

USAGE: clangd [options]


Color Options:

-color - Use colors in output (default=autodetect)

General options:

-aarch64-neon-syntax - Choose style of NEON code to emit from AArch64 backend:

- Emit generic NEON assembly
- Emit Apple-style NEON assembly

-all-scopes-completion - If set to true, code completion will include index symbols that are not defined in the scopes (e.g. namespaces) visible from the code completion point. Such completions can insert scope qualifiers.

-amdgpu-dpp-combine - Enable DPP combiner

-amdgpu-dump-hsa-metadata - Dump AMDGPU HSA Metadata

-amdgpu-enable-global-sgpr-addr - Enable use of SGPR regs for GLOBAL LOAD/STORE instructions

-amdgpu-enable-merge-m0 - Merge and hoist M0 initializations

-amdgpu-sdwa-peephole - Enable SDWA peepholer

-amdgpu-spill-sgpr-to-smem - Use scalar stores to spill SGPRs if supported by subtarget

-amdgpu-verify-hsa-metadata - Verify AMDGPU HSA Metadata

-amdgpu-vgpr-index-mode - Use GPR indexing mode instead of movrel for vector indexing

-arm-add-build-attributes -

-arm-implicit-it - Allow conditional instructions outdside of an IT block

- Accept in both ISAs, emit implicit ITs in Thumb
- Warn in ARM, reject in Thumb
- Accept in ARM, reject in Thumb
- Warn in ARM, emit implicit ITs in Thumb
for promoted counters only

-bounds-checking-single-trap - Use one trap block per function

-compile-commands-dir=<string> - Specify a path to look for compile_commands.json. If path is invalid, clangd will look in the current directory and parent paths of each source file.

-completion-style - Granularity of code completion suggestions

- One completion item for each semantically distinct completion, with full type information.
- Similar completion items (e.g. function overloads) are combined. Type information shown where possible.

-cost-kind - Target cost kind

- Reciprocal throughput
- Instruction latency
- Code size

-cvp-dont-process-adds -

-disable-promote-alloca-to-lds - Disable promote alloca to LDS

-disable-promote-alloca-to-vector - Disable promote alloca to vector

-do-counter-promotion - Do counter register promotion

-emscripten-cxx-exceptions-whitelist=<string> - The list of function names in which Emscripten-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_WHITELIST options)

-enable-cse-in-irtranslator - Should enable CSE in irtranslator

-enable-cse-in-legalizer - Should enable CSE in Legalizer

-enable-emscripten-cxx-exceptions - WebAssembly Emscripten-style exception handling

-enable-emscripten-sjlj - WebAssembly Emscripten-style setjmp/longjmp handling

-enable-gvn-memdep -

-enable-load-pre -

-enable-loop-simplifycfg-term-folding -

-enable-name-compression - Enable name string compression

-expensive-combines - Enable expensive instruction combines

-function-arg-placeholders - When disabled, completions contain only parentheses for function calls. When enabled, completions also contain placeholders for method parameters.

The default size is 8.

-hash-based-counter-split - Rename counter variable of a comdat function based on cfg hash

-header-insertion-decorators - Prepend a circular dot or space before the completion label, depending on whether an include line will be inserted or not.

-import-all-index - Import all external functions in index.

-input-style - Input JSON stream encoding

- usual LSP protocol
- messages delimited by --- lines, with # comment support

-instcombine-code-sinking - Enable code sinking

-instcombine-guard-widening-window=<uint> - How wide an instruction window to bypass looking for another guard

-instcombine-max-num-phis=<uint> - Maximum number phis to handle in intptr/ptrint folding

-instcombine-maxarray-size=<uint> - Maximum array size considered when doing a combine

-instrprof-atomic-counter-update-all - Make all profile counter updates atomic (for testing only)

-internalize-public-api-file=<filename> - A file containing list of symbol names to preserve

-internalize-public-api-list=<list> - A list of symbol names to preserve

-iterative-counter-promotion - Allow counter promotion across the whole loop nest.

-j=<uint> - Number of async workers used by clangd

-limit-results=<int> - Limit the number of results returned by clangd. 0 means no limit.

-log - Verbosity of log messages written to stderr

- Error messages only
- High level execution tracing
- Low level details

-lto-pass-remarks-output=<filename> - Output filename for pass remarks

-max-counter-promotions=<int> - Max number of allowed counter promotions

-max-counter-promotions-per-loop=<uint> - Max number counter promotions per loop to avoid increasing register pressure too much

-memop-size-large=<uint> - Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling.

-memop-size-range=<string> - Set the range of size in memory intrinsic calls to be profiled precisely, in a format of <start_val>:<end_val>

-merror-missing-parenthesis - Error for missing parenthesis around predicate registers

-merror-noncontigious-register - Error for register names that aren't contigious

-mhvx - Enable Hexagon Vector eXtensions

- Build for HVX v60
- Build for HVX v62
- Build for HVX v65
- Build for HVX v66

-mips-compact-branches - MIPS Specific: Compact branch policy.

- Do not use compact branches if possible.
- Use compact branches where appropiate (default).
- Always use compact branches if possible.

-mips16-constant-islands - Enable mips16 constant islands.

-mips16-hard-float - Enable mips16 hard float.

-mno-compound - Disable looking for compound instructions for Hexagon

-mno-fixup - Disable fixing up resolved relocations for Hexagon

-mno-ldc1-sdc1 - Expand double precision loads and stores to their single precision counterparts

-mno-pairing - Disable looking for duplex instructions for Hexagon

-mwarn-missing-parenthesis - Warn for missing parenthesis around predicate registers

-mwarn-noncontigious-register - Warn for register names that arent contigious

-mwarn-sign-mismatch - Warn for mismatching a signed and unsigned value

-no-discriminators - Disable generation of discriminator information.

-nvptx-sched4reg - NVPTX Specific: schedule for register pressue

-pch-storage - Storing PCHs in memory increases memory usages, but may improve performance

- store PCHs on disk
- store PCHs in memory

-pretty - Pretty-print JSON output

-r600-ir-structurize - Use StructurizeCFG IR pass

-rdf-dump -

-rdf-limit=<uint> -

-safepoint-ir-verifier-print-only -

-sample-profile-check-record-coverage=<N> - Emit a warning if less than N% of records in the input profile are matched to the IR.

-sample-profile-check-sample-coverage=<N> - Emit a warning if less than N% of samples in the input profile are matched to the IR.

-sample-profile-max-propagate-iterations=<uint> - Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.

speculative counter promotion
update can be further/iteratively promoted into an acyclic region.

-summary-file=<string> - The summary file to use for function importing.

-threads=<int> -

-verify-region-info - Verify region info (time consuming)

-vp-counters-per-site=<number> - The average number of profile counters allocated per value profiling site.

-vp-static-alloc - Do static counter allocation for value profiler

Generic Options:

-help - Display available options (-help-hidden for more)

-help-list - Display list of available options (-help-list-hidden for more)

-version - Display the version of this program

October 2020 clangd 8