'\"
'\" Copyright (c) 2003-2004 Paul H Alfille, MD
'\" (paul.alfille@gmail.com)
'\"
'\" Device manual page for the OWFS -- 1-wire filesystem package
'\" Based on Dallas Semiconductor, Inc's datasheets, and trial and error.
'\"
'\" Free for all use. No warranty. None. Use at your own risk.
'\"
.TH DS2404 3  2006 "OWFS Manpage" "One-Wire File System"
.SH NAME
.B DS2404
\- EconoRAM time chip
.TP
.B DS2404S
\- Dual port memory plus time
.TP
.B DS1994
\- 4k plus time iButton
.TP
.B DS1427
\- Time iButton
.SH SYNOPSIS
Real time clock, 4kbit memory. 3-wire interface, too.
.P
.B 04.XXXXXXXXXXXX 
/
.B alarm
|
.B auto
|
.B cycle
|
.B date
|
.B delay
|
.B interval
|
.B memory
|
.B pages/page.[0-15|ALL]
|
.B readonly/[memory|clock|cycle|interval]
|
.B memory
|
.B pages/page.[0-15|ALL]
|
.B readonly/[memory|clock|cycle|interval]
|
.B running
|
.B set_alarm
|
.B start
|
.B trigger/[cycle,date,interval,udate,uinterval]
|
.B udate
|
.B uinterval
|
'\"
'\" Copyright (c) 2003-2004 Paul H Alfille, MD
'\" (paul.alfille@gmail.com)
'\"
'\" Program manual page for the OWFS -- 1-wire filesystem package
'\" Based on Dallas Semiconductor, Inc's datasheets, and trial and error.
'\"
'\" Free for all use. No warranty. None. Use at your own risk.
'\"
.B address
|
.B crc8
|
.B id
|
.B locator
|
.B r_address
|
.B r_id
|
.B r_locator
|
.B type
.P
.B 84.XXXXXXXXXXXX
/
.B alarm
|
.B auto
|
.B cycle
|
.B date
|
.B delay
|
.B interval
|
.B memory
|
.B pages/page.[0-15|ALL]
|
.B readonly/[memory|clock|cycle|interval]
|
.B running
|
.B set_alarm
|
.B start
|
.B trigger/[cycle,date,interval,udate,uinterval]
|
.B udate
|
.B uinterval
|
.B address
|
.B crc8
|
.B id
|
.B present
|
.B type
.SH FAMILY CODE
.TP
.I 04
DS2404 DS1994
.TP
.I 84
DS1427 DS2404S
.SH SPECIAL PROPERTIES
.SS alarm
.I read-write, unsigned integer (0-111)
.br
.I Alarm
state of the
.I DS2404 (3)
triggered by time or counter events. Reading the alarm state clears the alarm.
.br
The 
.I alarm
value is of the form CIR, where:
.TP
C
.I cycle 
counter alarm
.br
.I 0
no
.br
.I 1
yes
.TP
I
.I interval
timer alarm
.br
.I 0
no
.br
.I 1
yes
.TP
R
real-time clock alarm
.br
.I 0
no
.br
.I 1
yes
.SS auto
.I read-write, yes-no
.br
Flag for mode of 
.I interval
counter operation. 0=manual 1=auto
.br
See the 
.I datasheet
for details.
.SS date
.I read-write, ascii
.br
26 character date representation of the
.I udate
value. Increments once per second while
.I running
.br
Actual internal representation has higher precision.
.br
Cannot be altered if
.I readonly/clock
is set.
.br
Setting
.I date
to a null string will put the current system time.
.br
Accepted date formats are:
.br
  Sat[urday] March 12 12:23:59 2001
.br
  Apr[il] 4 9:34:56 2002
.br
  3/23/04 23:34:57
.br
  current locale setting (your system's format)
.SS delay
.I read-write, yes-no
.br
Flag for adding a delay to
.I cycle
counter. 0=short 1-long
.br
See the 
.I datasheet
under "IDEL" for details.
.SS interval
.I read-write, date
.br
Interval timer value, represented as a 
.I date
string. More typically will be used as
.I uinterval
to read the actual elapsed seconds.
.SS memory
.I read-write, binary
.br
512 bytes of memory. The
.I readonly/memory
flag prevents further change.
.SS pages/page.0 ... pages/page.15 pages/page.ALL
.I read-write, yes-no
.br
Memory is split into 16 pages of 32 bytes each. The
.I readonly/memory
flag prevents further change.
.I ALL
is an aggregate of the pages. Each page is accessed sequentially.
.SS readonly/[memory|clock|interval|cycle]
.I read-write, yes-no
.br
Permanently protect part of the chip's function from alteration.
.TP
.I readonly/memory
.I page.X
and
. I memory
.TP
.I readonly/clock
.I date
and
.I udate
.TP
.I readonly/interval
.I interval
.TP
.I readonly/cycle
.I cycle
.SS running
.I read-write, yes-no
.br
State of the clock. 0=off 1=running.
.SS set_alarm
.I read-write, unsigned integer (0-111)
.br
Which of the
.I alarm
triggers are enabled in the
.I DS2404 (3)
.br
The 
.I set_alarm
value is of the form CIR, where:
.TP
C
.I cycle 
counter alarm
.br
.I 0
no
.br
.I 1
yes
.TP
I
.I interval
timer alarm
.br
.I 0
no
.br
.I 1
yes
.TP
R
real-time clock alarm
.br
.I 0
no
.br
.I 1
yes
.SS start
.I read-write, yes-no
.br
Flag for starting the 
.I interval
counter operation if not in 
.I auto
mode. 0=stop 1=start
.br
See the 
.I datasheet
for details.
.SS trigger/[cycle,date,interval,udate,uinterval]
.I read-write,varies
.br
Target value that will
.I trigger
the 
.I alarm
if the corresponding
.I set_alarm
field is set.
.br
The format is the same as the similarly named field (i.e.
.I date
for
.I trigger/date
)
.SS udate
.I read-write, unsigned integer
.br
Time represented as a number.
.I udate
increments once per second, while
.I running
is on.
.br
Usually set to unix time standard: number of seconds since Jan 1, 1970. The
.I date
field will be the unix representation of
.I udate
and setting either will change the other.
.SS uinterval
.I read-write, unsigned interval
.br
Similar to the 
.I udate
field, except corresponds to the
.I interval
value.
.SH STANDARD PROPERTIES
'\"
'\" Copyright (c) 2003-2004 Paul H Alfille, MD
'\" (paul.alfille@gmail.com)
'\"
'\" Program manual page for the OWFS -- 1-wire filesystem package
'\" Based on Dallas Semiconductor, Inc's datasheets, and trial and error.
'\"
'\" Free for all use. No warranty. None. Use at your own risk.
'\"
.SS address
.SS r_address
.I read-only, ascii
.br
The entire 64-bit unique ID. Given as upper case hexadecimal digits (0-9A-F).
.br
.I address
starts with the
.I family
code
.br
.I r address
is the
.I address
in reverse order, which is often used in other applications and labeling.
.SS crc8
.I read-only, ascii
.br
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexadecimal digits (0-9A-F).
.SS family
.I read-only, ascii
.br
The 8-bit family code. Unique to each
.I type
of device. Given as upper case hexadecimal digits (0-9A-F).
.SS id
.SS r_id
.I read-only, ascii
.br
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexadecimal digits (0-9A-F).
.br
.I r id
is the
.I id
in reverse order, which is often used in other applications and labeling.
.SS locator
.SS r_locator
.I read-only, ascii
.br
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a
.B Link Locator
the
.I locator will show a unique 8-byte number (16 character hexadecimal) starting with family code FE.
.br
If no
.B Link Locator
is between the device and the master, the
.I locator
field will be all FF.
.br
.I r locator
is the
.I locator
in reverse order.
.SS present (DEPRECATED)
.I read-only, yes-no
.br
Is the device currently
.I present
on the 1-wire bus?
.SS type
.I read-only, ascii
.br
Part name assigned by Dallas Semi. E.g.
.I DS2401
Alternative packaging (iButton vs chip) will not be distiguished.
.SH ALARMS
None implemented.
.SH DESCRIPTION
'\"
'\" Copyright (c) 2003-2004 Paul H Alfille, MD
'\" (paul.alfille@gmail.com)
'\"
'\" Program manual page for the OWFS -- 1-wire filesystem package
'\" Based on Dallas Semiconductor, Inc's datasheets, and trial and error.
'\"
'\" Free for all use. No warranty. None. Use at your own risk.
'\"
.SS 1-Wire
.I 1-wire 
is a wiring protocol and series of devices designed and manufactured
by Dallas Semiconductor, Inc. The bus is a low-power low-speed low-connector
scheme where the data line can also provide power.
.PP
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety
of devices, including memory, sensors (humidity, temperature, voltage,
contact, current), switches, timers and data loggers. More complex devices (like
thermocouple sensors) can be built with these basic devices. There are also
1-wire devices that have encryption included.
.PP
The 1-wire scheme uses a single 
.I bus master
and multiple
.I slaves
on the same wire. The bus master initiates all communication. The slaves can be 
individually discovered and addressed using their unique ID.
.PP
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB
adapters.
.SS OWFS design
.I OWFS
is a suite of programs that designed to make the 1-wire bus and its
devices easily accessible. The underlying principle is to create a virtual
filesystem, with the unique ID being the directory, and the individual
properties of the device are represented as simple files that can be read and written.
.PP 
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to 
provide an easy set of tools for a software designer to create monitoring or control applications. There 
are some performance enhancements in the implementation, including data caching, parallel access to bus 
masters, and aggregation of device communication. Still the fundamental goal has been ease of use, flexibility
and correctness rather than speed.
.SS DS1427 DS1994 DS2404 DS2404S
The
.B DS1427 (3), DS1994 (3), DS2404 (3),
and
.B DS2404S (3)
family of 1-wire devices includes clock functions, with timers, memory, counters and alarms. It is possible to write-protect regians of memory. Uses include software or hardware timing and control.
.P
.SS Chips
Both the
.B DS2404 (3)
and
.B DS2404S (3)
have 1-wire and 3-wire interfaces, which might be useful for transferring data between the 2 buses. They act as a passive slave to both buses. The
.B DS2404 (3)
and
.B DS2404S (3)
require an external source of power and an external crystal. They also offer a reset and 1HZ clock pin.
.P
.SS iButtons
Both the
.B DS1427
and
.B DS1994
offer the memory, alarms, and clock function in iButton format. Because the iButton is a complete sealed package, battery and crystal are internal. Everything is access via the 1-wire interface.
.SH ADDRESSING
'\"
'\" Copyright (c) 2003-2004 Paul H Alfille, MD
'\" (paul.alfille@gmail.com)
'\"
'\" Program manual page for the OWFS -- 1-wire filesystem package
'\" Based on Dallas Semiconductor, Inc's datasheets, and trial and error.
'\"
'\" Free for all use. No warranty. None. Use at your own risk.
'\"
All 1-wire devices are factory assigned a unique 64-bit address. This address is of the form:
.TP
.B Family Code
8 bits
.TP
.B Address
48 bits
.TP
.B CRC
8 bits
.IP
.PP
Addressing under OWFS is in hexadecimal, of form:
.IP
.B 01.123456789ABC
.PP
where
.B 01
is an example 8-bit family code, and
.B 12345678ABC
is an example 48 bit address.
.PP
The dot is optional, and the CRC code can included. If included, it must be correct.
.SH DATASHEET
.br
http://pdfserv.maxim-ic.com/en/ds/DS2404.pdf
.br
http://pdfserv.maxim-ic.com/en/ds/DS2404S-C01.pdf
.br
http://pdfserv.maxim-ic.com/en/ds/DS1994.pdf
.br
http://pdfserv.maxim-ic.com/en/ds/DS1427.pdf
.SH SEE ALSO
.SS Programs
.B owfs (1) owhttpd (1) owftpd (1) owserver (1)
.B owdir (1) owread (1) owwrite (1) owpresent (1)
.B owtap (1)
.SS Configuration and testing
.B owfs (5) owtap (1) owmon (1)
.SS Language bindings
.B owtcl (3) owperl (3) owcapi (3)
.SS Clocks
.B DS1427 (3) DS1904 (3) DS1994 (3) DS2404 (3) DS2404S (3) DS2415 (3) DS2417 (3)
.SS ID
.B DS2401 (3) DS2411 (3) DS1990A (3)
.SS Memory
.B DS1982 (3) DS1985 (3) DS1986 (3) DS1991 (3) DS1992 (3) DS1993 (3) DS1995 (3) DS1996 (3) DS2430A (3) DS2431 (3) DS2433 (3) DS2502 (3) DS2506 (3) DS28E04 (3) DS28EC20 (3)
.SS Switches
.B DS2405 (3) DS2406 (3) DS2408 (3) DS2409 (3) DS2413 (3) DS28EA00 (3) InfernoEmbedded (3)
.SS Temperature
.B DS1822 (3) DS1825 (3) DS1820 (3) DS18B20 (3) DS18S20 (3) DS1920 (3) DS1921 (3) DS1821 (3) DS28EA00 (3) DS28E04 (3) EDS0064 (3) EDS0065 (3) EDS0066 (3) EDS0067 (3) EDS0068 (3) EDS0071 (3) EDS0072 (3) MAX31826 (3)
.SS Humidity
.B DS1922 (3) DS2438 (3) EDS0065 (3) EDS0068 (3)
.SS Voltage
.B DS2450 (3)
.SS Resistance
.B DS2890 (3)
.SS Multifunction (current, voltage, temperature)
.B DS2436 (3) DS2437 (3) DS2438 (3) DS2751 (3) DS2755 (3) DS2756 (3) DS2760 (3) DS2770 (3) DS2780 (3) DS2781 (3) DS2788 (3) DS2784 (3)
.SS Counter
.B DS2423 (3)
.SS LCD Screen
.B LCD (3) DS2408 (3)
.SS Crypto
.B DS1977 (3)
.SS Pressure
.B DS2406 (3) TAI8570 (3) EDS0066 (3) EDS0068 (3)
.SS Moisture
.B EEEF (3) DS2438 (3)
.SH AVAILABILITY
http://www.owfs.org
.SH AUTHOR
Paul Alfille (paul.alfille@gmail.com)