.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.47.16.
.TH LLVM-SIZE "1" "August 2020" "llvm-size 8" "User Commands"
.SH NAME
llvm-size \- manual page for llvm-size 8
.SH DESCRIPTION
OVERVIEW: llvm object size dumper
.PP
USAGE: llvm\-size [options]
.PP
OPTIONS:
.PP
Color Options:
.HP
\fB\-color\fR \- Use colors in output (default=autodetect)
.PP
General options:
.IP
Specify output format
.HP
\fB\-A\fR \- System V format
.HP
\fB\-B\fR \- Berkeley format
.HP
\fB\-m\fR \- Darwin \fB\-m\fR format
.HP
\fB\-aarch64\-neon\-syntax\fR \- Choose style of NEON code to emit from AArch64 backend:
.TP
=generic
\- Emit generic NEON assembly
.TP
=apple
\- Emit Apple\-style NEON assembly
.HP
\fB\-amdgpu\-dpp\-combine\fR \- Enable DPP combiner
.HP
\fB\-amdgpu\-dump\-hsa\-metadata\fR \- Dump AMDGPU HSA Metadata
.HP
\fB\-amdgpu\-enable\-global\-sgpr\-addr\fR \- Enable use of SGPR regs for GLOBAL LOAD/STORE instructions
.HP
\fB\-amdgpu\-enable\-merge\-m0\fR \- Merge and hoist M0 initializations
.HP
\fB\-amdgpu\-sdwa\-peephole\fR \- Enable SDWA peepholer
.HP
\fB\-amdgpu\-spill\-sgpr\-to\-smem\fR \- Use scalar stores to spill SGPRs if supported by subtarget
.HP
\fB\-amdgpu\-verify\-hsa\-metadata\fR \- Verify AMDGPU HSA Metadata
.HP
\fB\-amdgpu\-vgpr\-index\-mode\fR \- Use GPR indexing mode instead of movrel for vector indexing
.HP
\fB\-arch=\fR \- architecture(s) from a Mach\-O file to dump
.HP
\fB\-arm\-add\-build\-attributes\fR \-
.HP
\fB\-arm\-implicit\-it\fR \- Allow conditional instructions outdside of an IT block
.TP
=always
\- Accept in both ISAs, emit implicit ITs in Thumb
.TP
=never
\- Warn in ARM, reject in Thumb
.TP
=arm
\- Accept in ARM, reject in Thumb
.TP
=thumb
\- Warn in ARM, emit implicit ITs in Thumb
.TP
\fB\-atomic\-counter\-update\-promoted\fR \- Do counter update using atomic fetch add
for promoted counters only
.HP
\fB\-bounds\-checking\-single\-trap\fR \- Use one trap block per function
.TP
\fB\-common\fR \- Print common symbols in the ELF file.
When using Berkely format, this is added to bss.
.HP
\fB\-cost\-kind\fR \- Target cost kind
.TP
=throughput
\- Reciprocal throughput
.TP
=latency
\- Instruction latency
.TP
=code\-size
\- Code size
.HP
\fB\-cvp\-dont\-process\-adds\fR \-
.IP
Print size in radix:
.HP
\fB\-o\fR \- Print size in octal
.HP
\fB\-d\fR \- Print size in decimal
.HP
\fB\-x\fR \- Print size in hexadecimal
.HP
\fB\-disable\-promote\-alloca\-to\-lds\fR \- Disable promote alloca to LDS
.HP
\fB\-disable\-promote\-alloca\-to\-vector\fR \- Disable promote alloca to vector
.HP
\fB\-do\-counter\-promotion\fR \- Do counter register promotion
.HP
\fB\-emscripten\-cxx\-exceptions\-whitelist=\fR \- The list of function names in which Emscripten\-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_WHITELIST options)
.HP
\fB\-enable\-cse\-in\-irtranslator\fR \- Should enable CSE in irtranslator
.HP
\fB\-enable\-cse\-in\-legalizer\fR \- Should enable CSE in Legalizer
.HP
\fB\-enable\-emscripten\-cxx\-exceptions\fR \- WebAssembly Emscripten\-style exception handling
.HP
\fB\-enable\-emscripten\-sjlj\fR \- WebAssembly Emscripten\-style setjmp/longjmp handling
.HP
\fB\-enable\-gvn\-memdep\fR \-
.HP
\fB\-enable\-load\-pre\fR \-
.HP
\fB\-enable\-loop\-simplifycfg\-term\-folding\fR \-
.HP
\fB\-enable\-name\-compression\fR \- Enable name string compression
.HP
\fB\-expensive\-combines\fR \- Enable expensive instruction combines
.HP
\fB\-format\fR \- Specify output format
.TP
=sysv
\- System V format
.TP
=berkeley
\- Berkeley format
.TP
=darwin
\- Darwin \fB\-m\fR format
.TP
\fB\-gpsize=\fR \- Global Pointer Addressing Size.
The default size is 8.
.HP
\fB\-hash\-based\-counter\-split\fR \- Rename counter variable of a comdat function based on cfg hash
.HP
\fB\-import\-all\-index\fR \- Import all external functions in index.
.HP
\fB\-instcombine\-code\-sinking\fR \- Enable code sinking
.HP
\fB\-instcombine\-guard\-widening\-window=\fR \- How wide an instruction window to bypass looking for another guard
.HP
\fB\-instcombine\-max\-num\-phis=\fR \- Maximum number phis to handle in intptr/ptrint folding
.HP
\fB\-instcombine\-maxarray\-size=\fR \- Maximum array size considered when doing a combine
.HP
\fB\-instrprof\-atomic\-counter\-update\-all\fR \- Make all profile counter updates atomic (for testing only)
.HP
\fB\-internalize\-public\-api\-file=\fR \- A file containing list of symbol names to preserve
.HP
\fB\-internalize\-public\-api\-list=\fR \- A list of symbol names to preserve
.HP
\fB\-iterative\-counter\-promotion\fR \- Allow counter promotion across the whole loop nest.
.HP
\fB\-l\fR \- When format is darwin, use long format to include addresses and offsets.
.HP
\fB\-lto\-pass\-remarks\-output=\fR \- Output filename for pass remarks
.HP
\fB\-max\-counter\-promotions=\fR \- Max number of allowed counter promotions
.HP
\fB\-max\-counter\-promotions\-per\-loop=\fR \- Max number counter promotions per loop to avoid increasing register pressure too much
.HP
\fB\-memop\-size\-large=\fR \- Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling.
.HP
\fB\-memop\-size\-range=\fR \- Set the range of size in memory intrinsic calls to be profiled precisely, in a format of :
.HP
\fB\-merror\-missing\-parenthesis\fR \- Error for missing parenthesis around predicate registers
.HP
\fB\-merror\-noncontigious\-register\fR \- Error for register names that aren't contigious
.HP
\fB\-mhvx\fR \- Enable Hexagon Vector eXtensions
.TP
=v60
\- Build for HVX v60
.TP
=v62
\- Build for HVX v62
.TP
=v65
\- Build for HVX v65
.TP
=v66
\- Build for HVX v66
.TP
=
\-
.HP
\fB\-mips\-compact\-branches\fR \- MIPS Specific: Compact branch policy.
.TP
=never
\- Do not use compact branches if possible.
.TP
=optimal
\- Use compact branches where appropiate (default).
.TP
=always
\- Always use compact branches if possible.
.HP
\fB\-mips16\-constant\-islands\fR \- Enable mips16 constant islands.
.HP
\fB\-mips16\-hard\-float\fR \- Enable mips16 hard float.
.HP
\fB\-mno\-compound\fR \- Disable looking for compound instructions for Hexagon
.HP
\fB\-mno\-fixup\fR \- Disable fixing up resolved relocations for Hexagon
.HP
\fB\-mno\-ldc1\-sdc1\fR \- Expand double precision loads and stores to their single precision counterparts
.HP
\fB\-mno\-pairing\fR \- Disable looking for duplex instructions for Hexagon
.HP
\fB\-mwarn\-missing\-parenthesis\fR \- Warn for missing parenthesis around predicate registers
.HP
\fB\-mwarn\-noncontigious\-register\fR \- Warn for register names that arent contigious
.HP
\fB\-mwarn\-sign\-mismatch\fR \- Warn for mismatching a signed and unsigned value
.HP
\fB\-no\-discriminators\fR \- Disable generation of discriminator information.
.HP
\fB\-nvptx\-sched4reg\fR \- NVPTX Specific: schedule for register pressue
.HP
\fB\-r600\-ir\-structurize\fR \- Use StructurizeCFG IR pass
.HP
\fB\-radix\fR \- Print size in radix
.TP
=8
\- Print size in octal
.TP
=10
\- Print size in decimal
.TP
=16
\- Print size in hexadecimal
.HP
\fB\-rdf\-dump\fR \-
.HP
\fB\-rdf\-limit=\fR \-
.HP
\fB\-safepoint\-ir\-verifier\-print\-only\fR \-
.HP
\fB\-sample\-profile\-check\-record\-coverage=\fR \- Emit a warning if less than N% of records in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-check\-sample\-coverage=\fR \- Emit a warning if less than N% of samples in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-max\-propagate\-iterations=\fR \- Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.
.TP
\fB\-speculative\-counter\-promotion\-max\-exiting=\fR \- The max number of exiting blocks of a loop to allow
speculative counter promotion
.TP
\fB\-speculative\-counter\-promotion\-to\-loop\fR \- When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter
update can be further/iteratively promoted into an acyclic region.
.HP
\fB\-summary\-file=\fR \- The summary file to use for function importing.
.HP
\fB\-threads=\fR \-
.HP
\fB\-totals\fR \- Print totals of all objects \- Berkeley format only
.HP
\fB\-verify\-region\-info\fR \- Verify region info (time consuming)
.HP
\fB\-vp\-counters\-per\-site=\fR \- The average number of profile counters allocated per value profiling site.
.HP
\fB\-vp\-static\-alloc\fR \- Do static counter allocation for value profiler
.PP
Generic Options:
.HP
\fB\-help\fR \- Display available options (\fB\-help\-hidden\fR for more)
.HP
\fB\-help\-list\fR \- Display list of available options (\fB\-help\-list\-hidden\fR for more)
.HP
\fB\-version\fR \- Display the version of this program