'\" t
.\"     Title: pci_set_cacheline_size
.\"    Author: [FIXME: author] [see http://docbook.sf.net/el/author]
.\" Generator: DocBook XSL Stylesheets v1.79.1 <http://docbook.sf.net/>
.\"      Date: January 2017
.\"    Manual: Hardware Interfaces
.\"    Source: Kernel Hackers Manual 4.8.15
.\"  Language: English
.\"
.TH "PCI_SET_CACHELINE_SI" "9" "January 2017" "Kernel Hackers Manual 4\&.8\&." "Hardware Interfaces"
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.SH "NAME"
pci_set_cacheline_size \- ensure the CACHE_LINE_SIZE register is programmed
.SH "SYNOPSIS"
.HP \w'int\ pci_set_cacheline_size('u
.BI "int pci_set_cacheline_size(struct\ pci_dev\ *\ " "dev" ");"
.SH "ARGUMENTS"
.PP
\fIdev\fR
.RS 4
the PCI device for which MWI is to be enabled
.RE
.SH "DESCRIPTION"
.PP
Helper function for pci_set_mwi\&. Originally copied from drivers/net/acenic\&.c\&. Copyright 1998\-2001 by Jes Sorensen, <jes\fItrained\fR\-monkey\&.org>\&.
.SH "RETURN"
.PP
An appropriate \-ERRNO error value on error, or zero for success\&.
.SH "COPYRIGHT"
.br