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.TH "DPGEN_ADSB2F" "3" "30 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual"

.SH NAME
DPGEN_ADSB2F \- Adder/Substractor Macro-Generator
.SH SYNOPSIS
.sp
\fB#include  <genlib.h>
.sp
void GENLIB_MACRO (DPGEN_ADSB2F, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB);
\fR
.SH "DESCRIPTION"
.PP
Generate a \fIN\fR bits adder/substractor named \fImodelname\fR\&.
.PP
How it works :
.TP 0.2i
\(bu
if the add_sub signal is set to \&'0' an addition is
performed, otherwise it's a substraction.
.TP 0.2i
\(bu
Operation can be either signed or unsigned. In unsigned
mode c31 is the overflow, in unsigned mode you have to compute
overflow by \fBXORing\fR c31 and c30\&.
.SS "TERMINAL NAMES"
.TP 3
1. 
add_sub : select addition or substraction
(input, 1 bit).
.TP 3
2. 
c31 : carry out. In unsigned mode, this is the
overflow (output, 1 bits). 
.TP 3
3. 
c30 : used to compute overflow in signed mode :
overflow := c31 xor c30 (output, 1 bits).
.TP 3
4. 
i1 : first operand (input, \fIN\fR bits). 
.TP 3
5. 
i0 : second operand (input, \fIN\fR bits). 
.TP 3
6. 
q : output (\fIN\fR bits). 
.TP 3
7. 
vdd : power. 
.TP 3
8. 
vss : ground. 
.SH "EXAMPLE"
.PP

.nf
GENLIB_MACRO(DPGEN_ADSB2F, "model_adsb2f_32"
                            , F_BEHAV|F_PLACE
                            , 32
                            );

GENLIB_LOINS( "model_adsb2f_32"
            , "instance1_adsb2f_32"
            , "add_sub"
            , "c32"
            , "c31"
            , "i1[31:0]"
            , "i0[31:0]"
            ,  "q[31:0]"
            , "vdd", "vss", NULL
            );
    
.fi
.SH "SEE ALSO"
.PP
\fBGENLIB_MACRO\fR(3),
\fBgenlib\fR(1)