.\" DO NOT MODIFY THIS FILE!  It was generated by help2man 1.47.4.
.TH LLVM-MC "1" "March 2018" "llvm-mc 6.0" "User Commands"
.SH NAME
llvm-mc \- manual page for llvm-mc 6.0
.SH DESCRIPTION
OVERVIEW: llvm machine code playground
.PP
USAGE: llvm\-mc [options] <input file>
.PP
OPTIONS:
.PP
General options:
.HP
\fB\-I=\fR<directory>                                    \- Directory of include files
.HP
\fB\-aarch64\-neon\-syntax\fR                              \- Choose style of NEON code to emit from AArch64 backend:
.TP
=generic
\-   Emit generic NEON assembly
.TP
=apple
\-   Emit Apple\-style NEON assembly
.HP
\fB\-amdgpu\-dump\-hsa\-metadata\fR                         \- Dump AMDGPU HSA Metadata
.HP
\fB\-amdgpu\-enable\-merge\-m0\fR                           \- Merge and hoist M0 initializations
.HP
\fB\-amdgpu\-sdwa\-peephole\fR                             \- Enable SDWA peepholer
.HP
\fB\-amdgpu\-spill\-sgpr\-to\-smem\fR                        \- Use scalar stores to spill SGPRs if supported by subtarget
.HP
\fB\-amdgpu\-verify\-hsa\-metadata\fR                       \- Verify AMDGPU HSA Metadata
.HP
\fB\-amdgpu\-vgpr\-index\-mode\fR                           \- Use GPR indexing mode instead of movrel for vector indexing
.HP
\fB\-arch=\fR<string>                                    \- Target arch to assemble for, see \fB\-version\fR for available targets
.HP
\fB\-arm\-add\-build\-attributes\fR                         \-
.HP
\fB\-arm\-implicit\-it\fR                                  \- Allow conditional instructions outdside of an IT block
.TP
=always
\-   Accept in both ISAs, emit implicit ITs in Thumb
.TP
=never
\-   Warn in ARM, reject in Thumb
.TP
=arm
\-   Accept in ARM, reject in Thumb
.TP
=thumb
\-   Warn in ARM, emit implicit ITs in Thumb
.HP
\fB\-asm\-instrumentation\fR                              \- Instrumentation of inline assembly and assembly source files
.TP
=none
\-   no instrumentation at all
.TP
=address
\-   instrument instructions with memory arguments
.HP
\fB\-asm\-show\-inst\fR                                    \- Emit internal instruction representation to assembly file
.TP
\fB\-atomic\-counter\-update\-promoted\fR                   \- Do counter update using atomic fetch add
for promoted counters only
.HP
\fB\-bounds\-checking\-single\-trap\fR                      \- Use one trap block per function
.HP
\fB\-color\fR                                            \- use colored syntax highlighting (default=autodetect)
.HP
\fB\-compress\-debug\-sections\fR                          \- Choose DWARF debug sections compression:
.TP
=none
\-   No compression
.TP
=zlib
\-   Use zlib compression
.TP
=zlib\-gnu
\-   Use zlib\-gnu compression (deprecated)
.HP
\fB\-cost\-kind\fR                                        \- Target cost kind
.TP
=throughput
\-   Reciprocal throughput
.TP
=latency
\-   Instruction latency
.TP
=code\-size
\-   Code size
.HP
\fB\-cvp\-dont\-process\-adds\fR                            \-
.HP
\fB\-debug\-counter\fR                                    \- Comma separated list of debug counter skip and count
.TP
=predicateinfo\-rename
\-   Controls which variables are renamed with predicateinfo
.TP
=instcombine\-visit
\-   Controls which instructions are visited
.TP
=newgvn\-vn
\-   Controls which instructions are value numbered
.TP
=newgvn\-phi
\-   Controls which instructions we create phi of ops for
.HP
\fB\-defsym=\fR<string>                                  \- Defines a symbol to be an integer constant
.IP
Action to perform:
.HP
\fB\-as\-lex\fR                                         \- Lex tokens from a .s file
.HP
\fB\-assemble\fR                                       \- Assemble a .s file (default)
.HP
\fB\-disassemble\fR                                    \- Disassemble strings of hex bytes
.HP
\fB\-mdis\fR                                           \- Marked up disassembly of strings of hex bytes
.HP
\fB\-do\-counter\-promotion\fR                             \- Do counter register promotion
.HP
\fB\-dwarf\-version=\fR<int>                              \- Dwarf version
.HP
\fB\-enable\-load\-pre\fR                                  \-
.HP
\fB\-enable\-name\-compression\fR                          \- Enable name string compression
.HP
\fB\-enable\-packed\-inlinable\-literals\fR                 \- Enable packed inlinable literals (v2f16, v2i16)
.HP
\fB\-enable\-si\-insert\-waitcnts\fR                        \- Use new waitcnt insertion pass
.HP
\fB\-expensive\-combines\fR                               \- Enable expensive instruction combines
.HP
\fB\-fatal\-warnings\fR                                   \- Treat warnings as errors
.HP
\fB\-fdebug\-compilation\-dir=\fR<string>                  \- Specifies the debug info's compilation dir
.HP
\fB\-filetype\fR                                         \- Choose an output file type:
.TP
=asm
\-   Emit an assembly ('.s') file
.TP
=null
\-   Don't emit anything (for timing purposes)
.TP
=obj
\-   Emit a native object ('.o') file
.HP
\fB\-g\fR                                                \- Generate dwarf debugging info for assembly source files
.TP
\fB\-gpsize=\fR<uint>                                    \- Global Pointer Addressing Size.
The default size is 8.
.HP
\fB\-hash\-based\-counter\-split\fR                         \- Rename counter variable of a comdat function based on cfg hash
.HP
\fB\-import\-all\-index\fR                                 \- Import all external functions in index.
.HP
\fB\-incremental\-linker\-compatible\fR                    \- When used with filetype=obj, emit an object file which can be used with an incremental linker
.HP
\fB\-instcombine\-maxarray\-size=\fR<uint>                 \- Maximum array size considered when doing a combine
.HP
\fB\-internalize\-public\-api\-file=\fR<filename>           \- A file containing list of symbol names to preserve
.HP
\fB\-internalize\-public\-api\-list=\fR<list>               \- A list of symbol names to preserve
.HP
\fB\-iterative\-counter\-promotion\fR                      \- Allow counter promotion across the whole loop nest.
.HP
\fB\-large\-code\-model\fR                                 \- Create cfi directives that assume the code might be more than 2gb away
.HP
\fB\-lto\-pass\-remarks\-output=\fR<filename>               \- Output filename for pass remarks
.HP
\fB\-main\-file\-name=\fR<string>                          \- Specifies the name we should consider the input file
.HP
\fB\-mattr=\fR<a1,+a2,\-a3,...>                           \- Target specific attributes (\fB\-mattr\fR=\fI\,help\/\fR for details)
.HP
\fB\-max\-counter\-promotions=\fR<int>                     \- Max number of allowed counter promotions
.HP
\fB\-max\-counter\-promotions\-per\-loop=\fR<uint>           \- Max number counter promotions per loop to avoid increasing register pressure too much
.HP
\fB\-mc\-relax\-all\fR                                     \- When used with filetype=obj, relax all fixups in the emitted object file
.HP
\fB\-mcpu=\fR<cpu\-name>                                  \- Target a specific cpu type (\fB\-mcpu\fR=\fI\,help\/\fR for details)
.HP
\fB\-memop\-size\-large=\fR<uint>                          \- Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling.
.HP
\fB\-memop\-size\-range=\fR<string>                        \- Set the range of size in memory intrinsic calls to be profiled precisely, in a format of <start_val>:<end_val>
.HP
\fB\-merror\-missing\-parenthesis\fR                       \- Error for missing parenthesis around predicate registers
.HP
\fB\-merror\-noncontigious\-register\fR                    \- Error for register names that aren't contigious
.HP
\fB\-mhvx\fR                                             \- Enable Hexagon Vector eXtensions
.TP
=v60
\-   Build for HVX v60
.TP
=v62
\-   Build for HVX v62
.TP
=v65
\-   Build for HVX v65
.TP
=
\-
.HP
\fB\-mips\-compact\-branches\fR                            \- MIPS Specific: Compact branch policy.
.TP
=never
\-   Do not use compact branches if possible.
.TP
=optimal
\-   Use compact branches where appropiate (default).
.TP
=always
\-   Always use compact branches if possible.
.HP
\fB\-mips16\-constant\-islands\fR                          \- Enable mips16 constant islands.
.HP
\fB\-mips16\-hard\-float\fR                                \- Enable mips16 hard float.
.HP
\fB\-mno\-compound\fR                                     \- Disable looking for compound instructions for Hexagon
.HP
\fB\-mno\-fixup\fR                                        \- Disable fixing up resolved relocations for Hexagon
.HP
\fB\-mno\-ldc1\-sdc1\fR                                    \- Expand double precision loads and stores to their single precision counterparts
.HP
\fB\-mno\-pairing\fR                                      \- Disable looking for duplex instructions for Hexagon
.HP
\fB\-mwarn\-missing\-parenthesis\fR                        \- Warn for missing parenthesis around predicate registers
.HP
\fB\-mwarn\-noncontigious\-register\fR                     \- Warn for register names that arent contigious
.HP
\fB\-mwarn\-sign\-mismatch\fR                              \- Warn for mismatching a signed and unsigned value
.HP
\fB\-n\fR                                                \- Don't assume assembly file starts in the text section
.HP
\fB\-no\-deprecated\-warn\fR                               \- Suppress all deprecated warnings
.HP
\fB\-no\-discriminators\fR                                \- Disable generation of discriminator information.
.HP
\fB\-no\-exec\-stack\fR                                    \- File doesn't need an exec stack
.HP
\fB\-no\-warn\fR                                          \- Suppress all warnings
.HP
\fB\-nvptx\-sched4reg\fR                                  \- NVPTX Specific: schedule for register pressue
.HP
\fB\-o=\fR<filename>                                     \- Output filename
.HP
\fB\-output\-asm\-variant=\fR<uint>                        \- Syntax variant to use for output printing
.HP
\fB\-pie\-copy\-relocations\fR                             \- PIE Copy Relocations
.HP
\fB\-position\-independent\fR                             \- Position independent
.HP
\fB\-preserve\-comments\fR                                \- Preserve Comments in outputted assembly
.HP
\fB\-print\-imm\-hex\fR                                    \- Prefer hex format for immediate values
.HP
\fB\-print\-module\-scope\fR                               \- When printing IR for print\-[before|after]{\-all} always print a module IR
.HP
\fB\-r600\-ir\-structurize\fR                              \- Use StructurizeCFG IR pass
.HP
\fB\-rdf\-dump\fR                                         \-
.HP
\fB\-rdf\-limit=\fR<uint>                                 \-
.HP
\fB\-relax\-relocations\fR                                \- Emit R_X86_64_GOTPCRELX instead of R_X86_64_GOTPCREL
.HP
\fB\-safepoint\-ir\-verifier\-print\-only\fR                 \-
.HP
\fB\-sample\-profile\-check\-record\-coverage=\fR<N>         \- Emit a warning if less than N% of records in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-check\-sample\-coverage=\fR<N>         \- Emit a warning if less than N% of samples in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-inline\-hot\-threshold=\fR<N>          \- Inlined functions that account for more than N% of all samples collected in the parent function, will be inlined again.
.HP
\fB\-sample\-profile\-max\-propagate\-iterations=\fR<uint>   \- Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.
.HP
\fB\-save\-temp\-labels\fR                                 \- Don't discard temporary labels
.HP
\fB\-show\-encoding\fR                                    \- Show instruction encodings
.HP
\fB\-show\-inst\fR                                        \- Show internal instruction representation
.HP
\fB\-show\-inst\-operands\fR                               \- Show instructions operands as parsed
.TP
\fB\-speculative\-counter\-promotion\-max\-exiting=\fR<uint> \- The max number of exiting blocks of a loop to allow
speculative counter promotion
.TP
\fB\-speculative\-counter\-promotion\-to\-loop\fR            \- When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter
update can be further/iteratively promoted into an acyclic  region.
.HP
\fB\-summary\-file=\fR<string>                            \- The summary file to use for function importing.
.HP
\fB\-threads=\fR<int>                                    \-
.HP
\fB\-triple=\fR<string>                                  \- Target triple to assemble for, see \fB\-version\fR for available targets
.HP
\fB\-unfold\-element\-atomic\-memcpy\-max\-elements=\fR<uint> \- Maximum number of elements in atomic memcpy the optimizer is allowed to unfold
.HP
\fB\-verify\-region\-info\fR                               \- Verify region info (time consuming)
.HP
\fB\-vp\-counters\-per\-site=\fR<number>                    \- The average number of profile counters allocated per value profiling site.
.HP
\fB\-vp\-static\-alloc\fR                                  \- Do static counter allocation for value profiler
.PP
Generic Options:
.HP
\fB\-help\fR                                             \- Display available options (\fB\-help\-hidden\fR for more)
.HP
\fB\-help\-list\fR                                        \- Display list of available options (\fB\-help\-list\-hidden\fR for more)
.HP
\fB\-version\fR                                          \- Display the version of this program
.SH "SEE ALSO"
The full documentation for
.B llvm-mc
is maintained as a Texinfo manual.  If the
.B info
and
.B llvm-mc
programs are properly installed at your site, the command
.IP
.B info llvm-mc
.PP
should give you access to the complete manual.