'\" t .\" Title: struct nand_chip .\" Author: .\" Generator: DocBook XSL Stylesheets v1.79.1 .\" Date: July 2017 .\" Manual: Structures .\" Source: Kernel Hackers Manual 4.11.6 .\" Language: English .\" .TH "STRUCT NAND_CHIP" "9" "July 2017" "Kernel Hackers Manual 4\&.11\&" "Structures" .\" ----------------------------------------------------------------- .\" * Define some portability stuff .\" ----------------------------------------------------------------- .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .\" http://bugs.debian.org/507673 .\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .ie \n(.g .ds Aq \(aq .el .ds Aq ' .\" ----------------------------------------------------------------- .\" * set default formatting .\" ----------------------------------------------------------------- .\" disable hyphenation .nh .\" disable justification (adjust text to left margin only) .ad l .\" ----------------------------------------------------------------- .\" * MAIN CONTENT STARTS HERE * .\" ----------------------------------------------------------------- .SH "NAME" struct_nand_chip \- NAND Private Flash Chip Data .SH "SYNOPSIS" .sp .nf struct nand_chip { struct mtd_info mtd; void __iomem * IO_ADDR_R; void __iomem * IO_ADDR_W; uint8_t (* read_byte) (struct mtd_info *mtd); u16 (* read_word) (struct mtd_info *mtd); void (* write_byte) (struct mtd_info *mtd, uint8_t byte); void (* write_buf) (struct mtd_info *mtd, const uint8_t *buf, int len); void (* read_buf) (struct mtd_info *mtd, uint8_t *buf, int len); void (* select_chip) (struct mtd_info *mtd, int chip); int (* block_bad) (struct mtd_info *mtd, loff_t ofs); int (* block_markbad) (struct mtd_info *mtd, loff_t ofs); void (* cmd_ctrl) (struct mtd_info *mtd, int dat, unsigned int ctrl); int (* dev_ready) (struct mtd_info *mtd); void (* cmdfunc) (struct mtd_info *mtd, unsigned command, int column,int page_addr); int(* waitfunc) (struct mtd_info *mtd, struct nand_chip *this); int (* erase) (struct mtd_info *mtd, int page); int (* scan_bbt) (struct mtd_info *mtd); int (* errstat) (struct mtd_info *mtd, struct nand_chip *this, int state,int status, int page); int (* write_page) (struct mtd_info *mtd, struct nand_chip *chip,uint32_t offset, int data_len, const uint8_t *buf,int oob_required, int page, int cached, int raw); int (* onfi_set_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para); int (* onfi_get_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para); int (* setup_read_retry) (struct mtd_info *mtd, int retry_mode); int (* setup_data_interface) (struct mtd_info *mtd,const struct nand_data_interface *conf,bool check_only); int chip_delay; unsigned int options; unsigned int bbt_options; int page_shift; int phys_erase_shift; int bbt_erase_shift; int chip_shift; int numchips; uint64_t chipsize; int pagemask; int pagebuf; unsigned int pagebuf_bitflips; int subpagesize; uint8_t bits_per_cell; uint16_t ecc_strength_ds; uint16_t ecc_step_ds; int onfi_timing_mode_default; int badblockpos; int badblockbits; int onfi_version; int jedec_version; union {unnamed_union}; u16 max_bb_per_die; u32 blocks_per_die; struct nand_data_interface * data_interface; int read_retries; flstate_t state; uint8_t * oob_poi; struct nand_hw_control * controller; struct nand_ecc_ctrl ecc; struct nand_buffers * buffers; struct nand_hw_control hwcontrol; uint8_t * bbt; struct nand_bbt_descr * bbt_td; struct nand_bbt_descr * bbt_md; struct nand_bbt_descr * badblock_pattern; void * priv; }; .fi .SH "MEMBERS" .PP struct mtd_info mtd .RS 4 MTD device registered to the MTD framework .RE .PP void __iomem * IO_ADDR_R .RS 4 [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device .RE .PP void __iomem * IO_ADDR_W .RS 4 [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device\&. .RE .PP uint8_t (*)(struct mtd_info *mtd) read_byte .RS 4 [REPLACEABLE] read one byte from the chip .RE .PP u16 (*)(struct mtd_info *mtd) read_word .RS 4 [REPLACEABLE] read one word from the chip .RE .PP void (*)(struct mtd_info *mtd, uint8_t byte) write_byte .RS 4 [REPLACEABLE] write a single byte to the chip on the low 8 I/O lines .RE .PP void (*)(struct mtd_info *mtd, const uint8_t *buf, int len) write_buf .RS 4 [REPLACEABLE] write data from the buffer to the chip .RE .PP void (*)(struct mtd_info *mtd, uint8_t *buf, int len) read_buf .RS 4 [REPLACEABLE] read data from the chip into the buffer .RE .PP void (*)(struct mtd_info *mtd, int chip) select_chip .RS 4 [REPLACEABLE] select chip nr .RE .PP int (*)(struct mtd_info *mtd, loff_t ofs) block_bad .RS 4 [REPLACEABLE] check if a block is bad, using OOB markers .RE .PP int (*)(struct mtd_info *mtd, loff_t ofs) block_markbad .RS 4 [REPLACEABLE] mark a block bad .RE .PP void (*)(struct mtd_info *mtd, int dat, unsigned int ctrl) cmd_ctrl .RS 4 [BOARDSPECIFIC] hardwarespecific function for controlling ALE/CLE/nCE\&. Also used to write command and address .RE .PP int (*)(struct mtd_info *mtd) dev_ready .RS 4 [BOARDSPECIFIC] hardwarespecific function for accessing device ready/busy line\&. If set to NULL no access to ready/busy is available and the ready/busy information is read from the chip status register\&. .RE .PP void (*)(struct mtd_info *mtd, unsigned command, int column,int page_addr) cmdfunc .RS 4 [REPLACEABLE] hardwarespecific function for writing commands to the chip\&. .RE .PP int(*)(struct mtd_info *mtd, struct nand_chip *this) waitfunc .RS 4 [REPLACEABLE] hardwarespecific function for wait on ready\&. .RE .PP int (*)(struct mtd_info *mtd, int page) erase .RS 4 [REPLACEABLE] erase function .RE .PP int (*)(struct mtd_info *mtd) scan_bbt .RS 4 [REPLACEABLE] function to scan bad block table .RE .PP int (*)(struct mtd_info *mtd, struct nand_chip *this, int state,int status, int page) errstat .RS 4 [OPTIONAL] hardware specific function to perform additional error status checks (determine if errors are correctable)\&. .RE .PP int (*)(struct mtd_info *mtd, struct nand_chip *chip,uint32_t offset, int data_len, const uint8_t *buf,int oob_required, int page, int cached, int raw) write_page .RS 4 [REPLACEABLE] High\-level page write function .RE .PP int (*)(struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para) onfi_set_features .RS 4 [REPLACEABLE] set the features for ONFI nand .RE .PP int (*)(struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para) onfi_get_features .RS 4 [REPLACEABLE] get the features for ONFI nand .RE .PP int (*)(struct mtd_info *mtd, int retry_mode) setup_read_retry .RS 4 [FLASHSPECIFIC] flash (vendor) specific function for setting the read\-retry mode\&. Mostly needed for MLC NAND\&. .RE .PP int (*)(struct mtd_info *mtd,const struct nand_data_interface *conf,bool check_only) setup_data_interface .RS 4 [OPTIONAL] setup the data interface and timing .RE .PP int chip_delay .RS 4 [BOARDSPECIFIC] chip dependent delay for transferring data from array to read regs (tR)\&. .RE .PP unsigned int options .RS 4 [BOARDSPECIFIC] various chip options\&. They can partly be set to inform nand_scan about special functionality\&. See the defines for further explanation\&. .RE .PP unsigned int bbt_options .RS 4 [INTERN] bad block specific options\&. All options used here must come from bbm\&.h\&. By default, these options will be copied to the appropriate nand_bbt_descr\*(Aqs\&. .RE .PP int page_shift .RS 4 [INTERN] number of address bits in a page (column address bits)\&. .RE .PP int phys_erase_shift .RS 4 [INTERN] number of address bits in a physical eraseblock .RE .PP int bbt_erase_shift .RS 4 [INTERN] number of address bits in a bbt entry .RE .PP int chip_shift .RS 4 [INTERN] number of address bits in one chip .RE .PP int numchips .RS 4 [INTERN] number of physical chips .RE .PP uint64_t chipsize .RS 4 [INTERN] the size of one chip for multichip arrays .RE .PP int pagemask .RS 4 [INTERN] page number mask = number of (pages / chip) \- 1 .RE .PP int pagebuf .RS 4 [INTERN] holds the pagenumber which is currently in data_buf\&. .RE .PP unsigned int pagebuf_bitflips .RS 4 [INTERN] holds the bitflip count for the page which is currently in data_buf\&. .RE .PP int subpagesize .RS 4 [INTERN] holds the subpagesize .RE .PP uint8_t bits_per_cell .RS 4 [INTERN] number of bits per cell\&. i\&.e\&., 1 means SLC\&. .RE .PP uint16_t ecc_strength_ds .RS 4 [INTERN] ECC correctability from the datasheet\&. Minimum amount of bit errors per \fIecc_step_ds\fR guaranteed to be correctable\&. If unknown, set to zero\&. .RE .PP uint16_t ecc_step_ds .RS 4 [INTERN] ECC step required by the \fIecc_strength_ds\fR, also from the datasheet\&. It is the recommended ECC step size, if known; if unknown, set to zero\&. .RE .PP int onfi_timing_mode_default .RS 4 [INTERN] default ONFI timing mode\&. This field is set to the actually used ONFI mode if the chip is ONFI compliant or deduced from the datasheet if the NAND chip is not ONFI compliant\&. .RE .PP int badblockpos .RS 4 [INTERN] position of the bad block marker in the oob area\&. .RE .PP int badblockbits .RS 4 [INTERN] minimum number of set bits in a good block\*(Aqs bad block marker position; i\&.e\&., BBM == 11110111b is not bad when badblockbits == 7 .RE .PP int onfi_version .RS 4 [INTERN] holds the chip ONFI version (BCD encoded), non 0 if ONFI supported\&. .RE .PP int jedec_version .RS 4 [INTERN] holds the chip JEDEC version (BCD encoded), non 0 if JEDEC supported\&. .RE .PP union {unnamed_union} .RS 4 anonymous .RE .PP u16 max_bb_per_die .RS 4 [INTERN] the max number of bad blocks each die of a this nand device will encounter their life times\&. .RE .PP u32 blocks_per_die .RS 4 [INTERN] The number of PEBs in a die .RE .PP struct nand_data_interface * data_interface .RS 4 [INTERN] NAND interface timing information .RE .PP int read_retries .RS 4 [INTERN] the number of read retry modes supported .RE .PP flstate_t state .RS 4 [INTERN] the current state of the NAND device .RE .PP uint8_t * oob_poi .RS 4 "poison value buffer," used for laying out OOB data before writing .RE .PP struct nand_hw_control * controller .RS 4 [REPLACEABLE] a pointer to a hardware controller structure which is shared among multiple independent devices\&. .RE .PP struct nand_ecc_ctrl ecc .RS 4 [BOARDSPECIFIC] ECC control structure .RE .PP struct nand_buffers * buffers .RS 4 buffer structure for read/write .RE .PP struct nand_hw_control hwcontrol .RS 4 platform\-specific hardware control structure .RE .PP uint8_t * bbt .RS 4 [INTERN] bad block table pointer .RE .PP struct nand_bbt_descr * bbt_td .RS 4 [REPLACEABLE] bad block table descriptor for flash lookup\&. .RE .PP struct nand_bbt_descr * bbt_md .RS 4 [REPLACEABLE] bad block table mirror descriptor .RE .PP struct nand_bbt_descr * badblock_pattern .RS 4 [REPLACEABLE] bad block scan pattern used for initial bad block scan\&. .RE .PP void * priv .RS 4 [OPTIONAL] pointer to private chip data .RE .SH "AUTHOR" .PP \fBThomas Gleixner\fR <\&tglx@linutronix.de\&> .RS 4 Author. .RE .SH "COPYRIGHT" .br