'\" t .\" Title: struct nand_chip .\" Author: .\" Generator: DocBook XSL Stylesheets v1.78.1 .\" Date: May 2018 .\" Manual: Structures .\" Source: Kernel Hackers Manual 3.16.56 .\" Language: English .\" .TH "STRUCT NAND_CHIP" "9" "May 2018" "Kernel Hackers Manual 3\&.16\&" "Structures" .\" ----------------------------------------------------------------- .\" * Define some portability stuff .\" ----------------------------------------------------------------- .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .\" http://bugs.debian.org/507673 .\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .ie \n(.g .ds Aq \(aq .el .ds Aq ' .\" ----------------------------------------------------------------- .\" * set default formatting .\" ----------------------------------------------------------------- .\" disable hyphenation .nh .\" disable justification (adjust text to left margin only) .ad l .\" ----------------------------------------------------------------- .\" * MAIN CONTENT STARTS HERE * .\" ----------------------------------------------------------------- .SH "NAME" struct_nand_chip \- NAND Private Flash Chip Data .SH "SYNOPSIS" .sp .nf struct nand_chip { void __iomem * IO_ADDR_R; void __iomem * IO_ADDR_W; uint8_t (* read_byte) (struct mtd_info *mtd); u16 (* read_word) (struct mtd_info *mtd); void (* write_byte) (struct mtd_info *mtd, uint8_t byte); void (* write_buf) (struct mtd_info *mtd, const uint8_t *buf, int len); void (* read_buf) (struct mtd_info *mtd, uint8_t *buf, int len); void (* select_chip) (struct mtd_info *mtd, int chip); int (* block_bad) (struct mtd_info *mtd, loff_t ofs, int getchip); int (* block_markbad) (struct mtd_info *mtd, loff_t ofs); void (* cmd_ctrl) (struct mtd_info *mtd, int dat, unsigned int ctrl); int (* init_size) (struct mtd_info *mtd, struct nand_chip *this,u8 *id_data); int (* dev_ready) (struct mtd_info *mtd); void (* cmdfunc) (struct mtd_info *mtd, unsigned command, int column,int page_addr); int(* waitfunc) (struct mtd_info *mtd, struct nand_chip *this); int (* erase) (struct mtd_info *mtd, int page); int (* scan_bbt) (struct mtd_info *mtd); int (* errstat) (struct mtd_info *mtd, struct nand_chip *this, int state,int status, int page); int (* write_page) (struct mtd_info *mtd, struct nand_chip *chip,uint32_t offset, int data_len, const uint8_t *buf,int oob_required, int page, int cached, int raw); int (* onfi_set_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para); int (* onfi_get_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para); int (* setup_read_retry) (struct mtd_info *mtd, int retry_mode); int chip_delay; unsigned int options; unsigned int bbt_options; int page_shift; int phys_erase_shift; int bbt_erase_shift; int chip_shift; int numchips; uint64_t chipsize; int pagemask; int pagebuf; unsigned int pagebuf_bitflips; int subpagesize; uint8_t bits_per_cell; uint16_t ecc_strength_ds; uint16_t ecc_step_ds; int badblockpos; int badblockbits; int onfi_version; int jedec_version; union {unnamed_union}; int read_retries; flstate_t state; uint8_t * oob_poi; struct nand_hw_control * controller; struct nand_ecc_ctrl ecc; struct nand_buffers * buffers; struct nand_hw_control hwcontrol; uint8_t * bbt; struct nand_bbt_descr * bbt_td; struct nand_bbt_descr * bbt_md; struct nand_bbt_descr * badblock_pattern; void * priv; }; .fi .SH "MEMBERS" .PP IO_ADDR_R .RS 4 [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device .RE .PP IO_ADDR_W .RS 4 [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device\&. .RE .PP read_byte .RS 4 [REPLACEABLE] read one byte from the chip .RE .PP read_word .RS 4 [REPLACEABLE] read one word from the chip .RE .PP write_byte .RS 4 [REPLACEABLE] write a single byte to the chip on the low 8 I/O lines .RE .PP write_buf .RS 4 [REPLACEABLE] write data from the buffer to the chip .RE .PP read_buf .RS 4 [REPLACEABLE] read data from the chip into the buffer .RE .PP select_chip .RS 4 [REPLACEABLE] select chip nr .RE .PP block_bad .RS 4 [REPLACEABLE] check if a block is bad, using OOB markers .RE .PP block_markbad .RS 4 [REPLACEABLE] mark a block bad .RE .PP cmd_ctrl .RS 4 [BOARDSPECIFIC] hardwarespecific function for controlling ALE/CLE/nCE\&. Also used to write command and address .RE .PP init_size .RS 4 [BOARDSPECIFIC] hardwarespecific function for setting mtd\->oobsize, mtd\->writesize and so on\&. \fIid_data\fR contains the 8 bytes values of NAND_CMD_READID\&. Return with the bus width\&. .RE .PP dev_ready .RS 4 [BOARDSPECIFIC] hardwarespecific function for accessing device ready/busy line\&. If set to NULL no access to ready/busy is available and the ready/busy information is read from the chip status register\&. .RE .PP cmdfunc .RS 4 [REPLACEABLE] hardwarespecific function for writing commands to the chip\&. .RE .PP waitfunc .RS 4 [REPLACEABLE] hardwarespecific function for wait on ready\&. .RE .PP erase .RS 4 [REPLACEABLE] erase function .RE .PP scan_bbt .RS 4 [REPLACEABLE] function to scan bad block table .RE .PP errstat .RS 4 [OPTIONAL] hardware specific function to perform additional error status checks (determine if errors are correctable)\&. .RE .PP write_page .RS 4 [REPLACEABLE] High\-level page write function .RE .PP onfi_set_features .RS 4 [REPLACEABLE] set the features for ONFI nand .RE .PP onfi_get_features .RS 4 [REPLACEABLE] get the features for ONFI nand .RE .PP setup_read_retry .RS 4 [FLASHSPECIFIC] flash (vendor) specific function for setting the read\-retry mode\&. Mostly needed for MLC NAND\&. .RE .PP chip_delay .RS 4 [BOARDSPECIFIC] chip dependent delay for transferring data from array to read regs (tR)\&. .RE .PP options .RS 4 [BOARDSPECIFIC] various chip options\&. They can partly be set to inform nand_scan about special functionality\&. See the defines for further explanation\&. .RE .PP bbt_options .RS 4 [INTERN] bad block specific options\&. All options used here must come from bbm\&.h\&. By default, these options will be copied to the appropriate nand_bbt_descr\*(Aqs\&. .RE .PP page_shift .RS 4 [INTERN] number of address bits in a page (column address bits)\&. .RE .PP phys_erase_shift .RS 4 [INTERN] number of address bits in a physical eraseblock .RE .PP bbt_erase_shift .RS 4 [INTERN] number of address bits in a bbt entry .RE .PP chip_shift .RS 4 [INTERN] number of address bits in one chip .RE .PP numchips .RS 4 [INTERN] number of physical chips .RE .PP chipsize .RS 4 [INTERN] the size of one chip for multichip arrays .RE .PP pagemask .RS 4 [INTERN] page number mask = number of (pages / chip) \- 1 .RE .PP pagebuf .RS 4 [INTERN] holds the pagenumber which is currently in data_buf\&. .RE .PP pagebuf_bitflips .RS 4 [INTERN] holds the bitflip count for the page which is currently in data_buf\&. .RE .PP subpagesize .RS 4 [INTERN] holds the subpagesize .RE .PP bits_per_cell .RS 4 [INTERN] number of bits per cell\&. i\&.e\&., 1 means SLC\&. .RE .PP ecc_strength_ds .RS 4 [INTERN] ECC correctability from the datasheet\&. Minimum amount of bit errors per \fIecc_step_ds\fR guaranteed to be correctable\&. If unknown, set to zero\&. .RE .PP ecc_step_ds .RS 4 [INTERN] ECC step required by the \fIecc_strength_ds\fR, also from the datasheet\&. It is the recommended ECC step size, if known; if unknown, set to zero\&. .RE .PP badblockpos .RS 4 [INTERN] position of the bad block marker in the oob area\&. .RE .PP badblockbits .RS 4 [INTERN] minimum number of set bits in a good block\*(Aqs bad block marker position; i\&.e\&., BBM == 11110111b is not bad when badblockbits == 7 .RE .PP onfi_version .RS 4 [INTERN] holds the chip ONFI version (BCD encoded), non 0 if ONFI supported\&. .RE .PP jedec_version .RS 4 [INTERN] holds the chip JEDEC version (BCD encoded), non 0 if JEDEC supported\&. .RE .PP {unnamed_union} .RS 4 anonymous .RE .PP read_retries .RS 4 [INTERN] the number of read retry modes supported .RE .PP state .RS 4 [INTERN] the current state of the NAND device .RE .PP oob_poi .RS 4 "poison value buffer," used for laying out OOB data before writing .RE .PP controller .RS 4 [REPLACEABLE] a pointer to a hardware controller structure which is shared among multiple independent devices\&. .RE .PP ecc .RS 4 [BOARDSPECIFIC] ECC control structure .RE .PP buffers .RS 4 buffer structure for read/write .RE .PP hwcontrol .RS 4 platform\-specific hardware control structure .RE .PP bbt .RS 4 [INTERN] bad block table pointer .RE .PP bbt_td .RS 4 [REPLACEABLE] bad block table descriptor for flash lookup\&. .RE .PP bbt_md .RS 4 [REPLACEABLE] bad block table mirror descriptor .RE .PP badblock_pattern .RS 4 [REPLACEABLE] bad block scan pattern used for initial bad block scan\&. .RE .PP priv .RS 4 [OPTIONAL] pointer to private chip data .RE .SH "AUTHOR" .PP \fBThomas Gleixner\fR <\&tglx@linutronix.de\&> .RS 4 Author. .RE .SH "COPYRIGHT" .br