'\" t .\" Title: drm_cvt_mode .\" Author: .\" Generator: DocBook XSL Stylesheets v1.78.1 .\" Date: May 2018 .\" Manual: DRM Core .\" Source: Kernel Hackers Manual 3.16.56 .\" Language: English .\" .TH "DRM_CVT_MODE" "9" "May 2018" "Kernel Hackers Manual 3\&.16\&" "DRM Core" .\" ----------------------------------------------------------------- .\" * Define some portability stuff .\" ----------------------------------------------------------------- .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .\" http://bugs.debian.org/507673 .\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .ie \n(.g .ds Aq \(aq .el .ds Aq ' .\" ----------------------------------------------------------------- .\" * set default formatting .\" ----------------------------------------------------------------- .\" disable hyphenation .nh .\" disable justification (adjust text to left margin only) .ad l .\" ----------------------------------------------------------------- .\" * MAIN CONTENT STARTS HERE * .\" ----------------------------------------------------------------- .SH "NAME" drm_cvt_mode \- create a modeline based on the CVT algorithm .SH "SYNOPSIS" .HP \w'struct\ drm_display_mode\ *\ drm_cvt_mode('u .BI "struct drm_display_mode * drm_cvt_mode(struct\ drm_device\ *\ " "dev" ", int\ " "hdisplay" ", int\ " "vdisplay" ", int\ " "vrefresh" ", bool\ " "reduced" ", bool\ " "interlaced" ", bool\ " "margins" ");" .SH "ARGUMENTS" .PP \fIdev\fR .RS 4 drm device .RE .PP \fIhdisplay\fR .RS 4 hdisplay size .RE .PP \fIvdisplay\fR .RS 4 vdisplay size .RE .PP \fIvrefresh\fR .RS 4 vrefresh rate .RE .PP \fIreduced\fR .RS 4 whether to use reduced blanking .RE .PP \fIinterlaced\fR .RS 4 whether to compute an interlaced mode .RE .PP \fImargins\fR .RS 4 whether to add margins (borders) .RE .SH "DESCRIPTION" .PP This function is called to generate the modeline based on CVT algorithm according to the hdisplay, vdisplay, vrefresh\&. It is based from the VESA(TM) Coordinated Video Timing Generator by Graham Loveridge April 9, 2003 available at .SH "HTTP" .PP //www\&.elo\&.utfsm\&.cl/~elo212/docs/CVTd6r1\&.xls .PP And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt\&.c\&. What I have done is to translate it by using integer calculation\&. .SH "RETURNS" .PP The modeline based on the CVT algorithm stored in a drm_display_mode object\&. The display mode object is allocated with \fBdrm_mode_create\fR\&. Returns NULL when no mode could be allocated\&. .SH "AUTHORS" .PP \fBJesse Barnes\fR <\&jesse.barnes@intel.com\&> .br Intel Corporation, .RS 4 Initial version .RE .PP \fBLaurent Pinchart\fR <\&laurent.pinchart@ideasonboard.com\&> .br Ideas on board SPRL, .RS 4 Driver internals .RE .PP \fBDaniel Vetter\fR <\&daniel.vetter@ffwll.ch\&> .br Intel Corporation, .RS 4 Contributions all over the place .RE .SH "COPYRIGHT" .br