.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.46.4.
.TH LLVM-RTDYLD "1" "October 2016" "llvm-rtdyld 3.8" "User Commands"
.SH NAME
llvm-rtdyld \- manual page for llvm-rtdyld 3.8
.SH DESCRIPTION
ERROR: ld.so: object 'libfakeroot\-sysv.so' from LD_PRELOAD cannot be preloaded (cannot open shared object file): ignored.
OVERVIEW: llvm MC\-JIT tool
.PP
USAGE: llvm\-rtdyld [options]
.PP
OPTIONS:
.PP
General options:
.HP
\fB\-aarch64\-neon\-syntax\fR \- Choose style of NEON code to emit from AArch64 backend:
.TP
=generic
\- Emit generic NEON assembly
.TP
=apple
\- Emit Apple\-style NEON assembly
.HP
\fB\-bounds\-checking\-single\-trap\fR \- Use one trap block per function
.HP
\fB\-check=\fR \- File containing RuntimeDyld verifier checks.
.HP
\fB\-color\fR \- use colored syntax highlighting (default=autodetect)
.HP
\fB\-cppfname=\fR \- Specify the name of the generated function
.HP
\fB\-cppfor=\fR \- Specify the name of the thing to generate
.HP
\fB\-cppgen\fR \- Choose what kind of output to generate
.TP
=program
\- Generate a complete program
.TP
=module
\- Generate a module definition
.TP
=contents
\- Generate contents of a module
.TP
=function
\- Generate a function definition
.TP
=functions
\- Generate all function definitions
.TP
=inline
\- Generate an inline function
.TP
=variable
\- Generate a variable definition
.TP
=type
\- Generate a type definition
.HP
\fB\-disable\-spill\-fusing\fR \- Disable fusing of spill code into instructions
.HP
\fB\-dylib=\fR \- Add library.
.HP
\fB\-enable\-implicit\-null\-checks\fR \- Fold null checks into faulting memory operations
.HP
\fB\-enable\-load\-pre\fR \-
.HP
\fB\-enable\-objc\-arc\-opts\fR \- enable/disable all ARC Optimizations
.HP
\fB\-enable\-scoped\-noalias\fR \-
.HP
\fB\-enable\-tbaa\fR \-
.HP
\fB\-entry=\fR \- Function to call as entry point.
.HP
\fB\-exhaustive\-register\-search\fR \- Exhaustive Search for registers bypassing the depth and interference cutoffs of last chance recoloring
.HP
\fB\-filter\-print\-funcs=\fR \- Only print IR for functions whose name match this for all print\-[before|after][\-all] options
.TP
\fB\-gpsize=\fR \- Global Pointer Addressing Size.
The default size is 8.
.HP
\fB\-imp\-null\-check\-page\-size=\fR \- The page size of the target in bytes
.HP
\fB\-internalize\-public\-api\-file=\fR \- A file containing list of symbol names to preserve
.HP
\fB\-internalize\-public\-api\-list=\fR \- A list of symbol names to preserve
.HP
\fB\-join\-liveintervals\fR \- Coalesce copies (default=true)
.HP
\fB\-limit\-float\-precision=\fR \- Generate low\-precision inline sequences for some float libcalls
.HP
\fB\-mcpu=\fR \- Target a specific cpu type (\fB\-mcpu\fR=\fI\,help\/\fR for details)
.HP
\fB\-merror\-missing\-parenthesis\fR \- Error for missing parenthesis around predicate registers
.HP
\fB\-merror\-noncontigious\-register\fR \- Error for register names that aren't contigious
.HP
\fB\-mfuture\-regs\fR \- Enable future registers
.HP
\fB\-mips16\-constant\-islands\fR \- Enable mips16 constant islands.
.HP
\fB\-mips16\-hard\-float\fR \- Enable mips16 hard float.
.HP
\fB\-mno\-compound\fR \- Disable looking for compound instructions for Hexagon
.HP
\fB\-mno\-ldc1\-sdc1\fR \- Expand double precision loads and stores to their single precision counterparts
.HP
\fB\-mno\-pairing\fR \- Disable looking for duplex instructions for Hexagon
.HP
\fB\-mwarn\-missing\-parenthesis\fR \- Warn for missing parenthesis around predicate registers
.HP
\fB\-mwarn\-noncontigious\-register\fR \- Warn for register names that arent contigious
.HP
\fB\-mwarn\-sign\-mismatch\fR \- Warn for mismatching a signed and unsigned value
.HP
\fB\-no\-discriminators\fR \- Disable generation of discriminator information.
.HP
\fB\-nvptx\-sched4reg\fR \- NVPTX Specific: schedule for register pressue
.HP
\fB\-preallocate\fR \- Allocate memory upfront rather than on\-demand
.HP
\fB\-print\-after\-all\fR \- Print IR after each pass
.HP
\fB\-print\-before\-all\fR \- Print IR before each pass
.HP
\fB\-print\-machineinstrs=\fR \- Print machine instrs
.HP
\fB\-rdf\-dump\fR \-
.HP
\fB\-rdf\-limit=\fR \-
.HP
\fB\-regalloc\fR \- Register allocator to use
.TP
=default
\- pick register allocator based on \fB\-O\fR option
.TP
=basic
\- basic register allocator
.TP
=fast
\- fast register allocator
.TP
=greedy
\- greedy register allocator
.TP
=pbqp
\- PBQP register allocator
.HP
\fB\-rewrite\-map\-file=\fR \- Symbol Rewrite Map
.HP
\fB\-rng\-seed=\fR \- Seed for the random number generator
.HP
\fB\-sample\-profile\-check\-record\-coverage=\fR \- Emit a warning if less than N% of records in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-check\-sample\-coverage=\fR \- Emit a warning if less than N% of samples in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-global\-cold\-threshold=\fR \- Top\-level functions that account for less than N% of all samples collected in the profile, will be marked as cold for the inliner to consider.
.HP
\fB\-sample\-profile\-global\-hot\-threshold=\fR \- Top\-level functions that account for more than N% of all samples collected in the profile, will be marked as hot for the inliner to consider.
.HP
\fB\-sample\-profile\-inline\-hot\-threshold=\fR \- Inlined functions that account for more than N% of all samples collected in the parent function, will be inlined again.
.HP
\fB\-sample\-profile\-max\-propagate\-iterations=\fR \- Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.
.HP
\fB\-stackmap\-version=\fR \- Specify the stackmap encoding version (default = 1)
.HP
\fB\-stats\fR \- Enable statistics output from program (available with Asserts)
.HP
\fB\-summary\-file=\fR \- The summary file to use for function importing.
.HP
\fB\-time\-passes\fR \- Time each pass, printing elapsed time for each on exit
.HP
\fB\-triple=\fR \- Target triple for disassembler
.IP
Action to perform:
.HP
\fB\-execute\fR \- Load, link, and execute the inputs.
.HP
\fB\-printline\fR \- Load, link, and print line information for each function.
.HP
\fB\-printdebugline\fR \- Load, link, and print line information for each function using the debug object
.HP
\fB\-printobjline\fR \- Like \fB\-printlineinfo\fR but does not load the object first
.HP
\fB\-verify\fR \- Load, link and verify the resulting memory image.
.HP
\fB\-verify\-debug\-info\fR \-
.HP
\fB\-verify\-dom\-info\fR \- Verify dominator info (time consuming)
.HP
\fB\-verify\-loop\-info\fR \- Verify loop info (time consuming)
.HP
\fB\-verify\-regalloc\fR \- Verify during register allocation
.HP
\fB\-verify\-region\-info\fR \- Verify region info (time consuming)
.HP
\fB\-verify\-scev\fR \- Verify ScalarEvolution's backedge taken counts (slow)
.HP
\fB\-x86\-asm\-syntax\fR \- Choose style of code to emit from X86 backend:
.TP
=att
\- Emit AT&T\-style assembly
.TP
=intel
\- Emit Intel\-style assembly
.PP
Generic Options:
.HP
\fB\-help\fR \- Display available options (\fB\-help\-hidden\fR for more)
.HP
\fB\-help\-list\fR \- Display list of available options (\fB\-help\-list\-hidden\fR for more)
.HP
\fB\-version\fR \- Display the version of this program
.SH "SEE ALSO"
The full documentation for
.B llvm-rtdyld
is maintained as a Texinfo manual. If the
.B info
and
.B llvm-rtdyld
programs are properly installed at your site, the command
.IP
.B info llvm-rtdyld
.PP
should give you access to the complete manual.