'\" t
.\"     Title: struct spi_message
.\"    Author: [FIXME: author] [see http://docbook.sf.net/el/author]
.\" Generator: DocBook XSL Stylesheets v1.78.1 <http://docbook.sf.net/>
.\"      Date: January 2017
.\"    Manual: Serial Peripheral Interface (SPI)
.\"    Source: Kernel Hackers Manual 4.8.15
.\"  Language: English
.\"
.TH "STRUCT SPI_MESSAGE" "9" "January 2017" "Kernel Hackers Manual 4\&.8\&." "Serial Peripheral Interface (S"
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.SH "NAME"
struct_spi_message \- one multi\-segment SPI transaction
.SH "SYNOPSIS"
.sp
.nf
struct spi_message {
  struct list_head transfers;
  struct spi_device * spi;
  unsigned is_dma_mapped:1;
  void (* complete) (void *context);
  void * context;
  unsigned frame_length;
  unsigned actual_length;
  int status;
  struct list_head queue;
  void * state;
  struct list_head resources;
};  
.fi
.SH "MEMBERS"
.PP
transfers
.RS 4
list of transfer segments in this transaction
.RE
.PP
spi
.RS 4
SPI device to which the transaction is queued
.RE
.PP
is_dma_mapped
.RS 4
if true, the caller provided both dma and cpu virtual addresses for each transfer buffer
.RE
.PP
complete
.RS 4
called to report transaction completions
.RE
.PP
context
.RS 4
the argument to
\fBcomplete\fR
when it\*(Aqs called
.RE
.PP
frame_length
.RS 4
the total number of bytes in the message
.RE
.PP
actual_length
.RS 4
the total number of bytes that were transferred in all successful segments
.RE
.PP
status
.RS 4
zero for success, else negative errno
.RE
.PP
queue
.RS 4
for use by whichever driver currently owns the message
.RE
.PP
state
.RS 4
for use by whichever driver currently owns the message
.RE
.PP
resources
.RS 4
for resource management when the spi message is processed
.RE
.SH "DESCRIPTION"
.PP
A
\fIspi_message\fR
is used to execute an atomic sequence of data transfers, each represented by a struct spi_transfer\&. The sequence is
\(lqatomic\(rq
in the sense that no other spi_message may use that SPI bus until that sequence completes\&. On some systems, many such sequences can execute as as single programmed DMA transfer\&. On all systems, these messages are queued, and might complete after transactions to other devices\&. Messages sent to a given spi_device are always executed in FIFO order\&.
.PP
The code that submits an spi_message (and its spi_transfers) to the lower layers is responsible for managing its memory\&. Zero\-initialize every field you don\*(Aqt set up explicitly, to insulate against future API updates\&. After you submit a message and its transfers, ignore them until its completion callback\&.
.SH "COPYRIGHT"
.br