'\" t
.\"     Title: struct spi_device
.\"    Author: [FIXME: author] [see http://docbook.sf.net/el/author]
.\" Generator: DocBook XSL Stylesheets v1.78.1 <http://docbook.sf.net/>
.\"      Date: January 2017
.\"    Manual: Serial Peripheral Interface (SPI)
.\"    Source: Kernel Hackers Manual 4.8.15
.\"  Language: English
.\"
.TH "STRUCT SPI_DEVICE" "9" "January 2017" "Kernel Hackers Manual 4\&.8\&." "Serial Peripheral Interface (S"
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.SH "NAME"
struct_spi_device \- Master side proxy for an SPI slave device
.SH "SYNOPSIS"
.sp
.nf
struct spi_device {
  struct device dev;
  struct spi_master * master;
  u32 max_speed_hz;
  u8 chip_select;
  u8 bits_per_word;
  u16 mode;
#define SPI_CPHA	0x01
#define SPI_CPOL	0x02
#define SPI_MODE_0	(0|0)
#define SPI_MODE_1	(0|SPI_CPHA)
#define SPI_MODE_2	(SPI_CPOL|0)
#define SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
#define SPI_CS_HIGH	0x04
#define SPI_LSB_FIRST	0x08
#define SPI_3WIRE	0x10
#define SPI_LOOP	0x20
#define SPI_NO_CS	0x40
#define SPI_READY	0x80
#define SPI_TX_DUAL	0x100
#define SPI_TX_QUAD	0x200
#define SPI_RX_DUAL	0x400
#define SPI_RX_QUAD	0x800
  int irq;
  void * controller_state;
  void * controller_data;
  char modalias[SPI_NAME_SIZE];
  int cs_gpio;
  struct spi_statistics statistics;
};  
.fi
.SH "MEMBERS"
.PP
dev
.RS 4
Driver model representation of the device\&.
.RE
.PP
master
.RS 4
SPI controller used with the device\&.
.RE
.PP
max_speed_hz
.RS 4
Maximum clock rate to be used with this chip (on this board); may be changed by the device\*(Aqs driver\&. The spi_transfer\&.speed_hz can override this for each transfer\&.
.RE
.PP
chip_select
.RS 4
Chipselect, distinguishing chips handled by
\fImaster\fR\&.
.RE
.PP
bits_per_word
.RS 4
Data transfers involve one or more words; word sizes like eight or 12 bits are common\&. In\-memory wordsizes are powers of two bytes (e\&.g\&. 20 bit samples use 32 bits)\&. This may be changed by the device\*(Aqs driver, or left at the default (0) indicating protocol words are eight bit bytes\&. The spi_transfer\&.bits_per_word can override this for each transfer\&.
.RE
.PP
mode
.RS 4
The spi mode defines how data is clocked out and in\&. This may be changed by the device\*(Aqs driver\&. The
\(lqactive low\(rq
default for chipselect mode can be overridden (by specifying SPI_CS_HIGH) as can the
\(lqMSB first\(rq
default for each word in a transfer (by specifying SPI_LSB_FIRST)\&.
.RE
.PP
irq
.RS 4
Negative, or the number passed to
\fBrequest_irq\fR
to receive interrupts from this device\&.
.RE
.PP
controller_state
.RS 4
Controller\*(Aqs runtime state
.RE
.PP
controller_data
.RS 4
Board\-specific definitions for controller, such as FIFO initialization parameters; from board_info\&.controller_data
.RE
.PP
modalias[SPI_NAME_SIZE]
.RS 4
Name of the driver to use with this device, or an alias for that name\&. This appears in the sysfs
\(lqmodalias\(rq
attribute for driver coldplugging, and in uevents used for hotplugging
.RE
.PP
cs_gpio
.RS 4
gpio number of the chipselect line (optional, \-ENOENT when when not using a GPIO line)
.RE
.PP
statistics
.RS 4
statistics for the spi_device
.RE
.SH "DESCRIPTION"
.PP
A
\fIspi_device\fR
is used to interchange data between an SPI slave (usually a discrete chip) and CPU memory\&.
.PP
In
\fIdev\fR, the platform_data is used to hold information about this device that\*(Aqs meaningful to the device\*(Aqs protocol driver, but not to its controller\&. One example might be an identifier for a chip variant with slightly different functionality; another might be information about how this particular board wires the chip\*(Aqs pins\&.
.SH "COPYRIGHT"
.br