.\" DO NOT MODIFY THIS FILE!  It was generated by help2man 1.47.6.
.TH LLI "1" "March 2018" "lli 5.0" "User Commands"
.SH NAME
lli \- manual page for lli 5.0
.SH DESCRIPTION
OVERVIEW: llvm interpreter & dynamic compiler
.PP
USAGE: lli [options] <input bitcode> <program arguments>...
.PP
OPTIONS:
.PP
General options:
.HP
\fB\-O=\fR<char>                                         \- Optimization level. [\-O0, \fB\-O1\fR, \fB\-O2\fR, or \fB\-O3]\fR (default = '\-O2')
.HP
\fB\-aarch64\-neon\-syntax\fR                              \- Choose style of NEON code to emit from AArch64 backend:
.TP
=generic
\-   Emit generic NEON assembly
.TP
=apple
\-   Emit Apple\-style NEON assembly
.HP
\fB\-amdgpu\-dump\-comd\fR                                 \- Dump AMDGPU Code Object Metadata
.HP
\fB\-amdgpu\-enable\-merge\-m0\fR                           \- Merge and hoist M0 initializations
.HP
\fB\-amdgpu\-sdwa\-peephole\fR                             \- Enable SDWA peepholer
.HP
\fB\-amdgpu\-spill\-sgpr\-to\-smem\fR                        \- Use scalar stores to spill SGPRs if supported by subtarget
.HP
\fB\-amdgpu\-verify\-comd\fR                               \- Verify AMDGPU Code Object Metadata
.HP
\fB\-amdgpu\-vgpr\-index\-mode\fR                           \- Use GPR indexing mode instead of movrel for vector indexing
.HP
\fB\-arm\-add\-build\-attributes\fR                         \-
.HP
\fB\-arm\-implicit\-it\fR                                  \- Allow conditional instructions outdside of an IT block
.TP
=always
\-   Accept in both ISAs, emit implicit ITs in Thumb
.TP
=never
\-   Warn in ARM, reject in Thumb
.TP
=arm
\-   Accept in ARM, reject in Thumb
.TP
=thumb
\-   Warn in ARM, emit implicit ITs in Thumb
.TP
\fB\-atomic\-counter\-update\-promoted\fR                   \- Do counter update using atomic fetch add
for promoted counters only
.HP
\fB\-bounds\-checking\-single\-trap\fR                      \- Use one trap block per function
.HP
\fB\-code\-model\fR                                       \- Choose code model
.TP
=default
\-   Target default JIT code model
.TP
=small
\-   Small code model
.TP
=kernel
\-   Kernel code model
.TP
=medium
\-   Medium code model
.TP
=large
\-   Large code model
.HP
\fB\-color\fR                                            \- use colored syntax highlighting (default=autodetect)
.HP
\fB\-cvp\-dont\-process\-adds\fR                            \-
.HP
\fB\-debug\-counter\fR                                    \- Comma separated list of debug counter skip and count
.TP
=predicateinfo\-rename
\-   Controls which variables are renamed with predicateinfo
.TP
=newgvn\-vn
\-   Controls which instructions are value numbered
.TP
=newgvn\-phi
\-   Controls which instructions we create phi of ops for
.HP
\fB\-disable\-lazy\-compilation\fR                         \- Disable JIT lazy compilation
.HP
\fB\-disable\-spill\-fusing\fR                             \- Disable fusing of spill code into instructions
.HP
\fB\-do\-counter\-promotion\fR                             \- Do counter register promotion
.HP
\fB\-enable\-cache\-manager\fR                             \- Use cache manager to save/load mdoules
.HP
\fB\-enable\-implicit\-null\-checks\fR                      \- Fold null checks into faulting memory operations
.HP
\fB\-enable\-load\-pre\fR                                  \-
.HP
\fB\-enable\-name\-compression\fR                          \- Enable name string compression
.HP
\fB\-enable\-objc\-arc\-opts\fR                             \- enable/disable all ARC Optimizations
.HP
\fB\-enable\-packed\-inlinable\-literals\fR                 \- Enable packed inlinable literals (v2f16, v2i16)
.HP
\fB\-enable\-scoped\-noalias\fR                            \-
.HP
\fB\-enable\-si\-insert\-waitcnts\fR                        \- Use new waitcnt insertion pass
.HP
\fB\-enable\-tbaa\fR                                      \-
.HP
\fB\-entry\-function=\fR<function>                        \- Specify the entry function (default = 'main') of the executable
.HP
\fB\-exhaustive\-register\-search\fR                       \- Exhaustive Search for registers bypassing the depth and interference cutoffs of last chance recoloring
.HP
\fB\-expensive\-combines\fR                               \- Enable expensive instruction combines
.HP
\fB\-extra\-archive=\fR<input archive>                    \- Extra archive files to be loaded
.HP
\fB\-extra\-module=\fR<input bitcode>                     \- Extra modules to be loaded
.HP
\fB\-extra\-object=\fR<input object>                      \- Extra object files to be loaded
.HP
\fB\-fake\-argv0=\fR<executable>                          \- Override the 'argv[0]' value passed into the executing program
.HP
\fB\-filter\-print\-funcs=\fR<function names>              \- Only print IR for functions whose name match this for all print\-[before|after][\-all] options
.HP
\fB\-float\-abi\fR                                        \- Choose float ABI type
.TP
=default
\-   Target default float ABI type
.TP
=soft
\-   Soft float ABI (implied by \fB\-soft\-float\fR)
.TP
=hard
\-   Hard float ABI (uses FP registers)
.HP
\fB\-force\-interpreter\fR                                \- Force interpretation: disable JIT
.TP
\fB\-gpsize=\fR<uint>                                    \- Global Pointer Addressing Size.
The default size is 8.
.HP
\fB\-hash\-based\-counter\-split\fR                         \- Rename counter variable of a comdat function based on cfg hash
.HP
\fB\-imp\-null\-check\-page\-size=\fR<int>                   \- The page size of the target in bytes
.HP
\fB\-imp\-null\-max\-insts\-to\-consider=\fR<uint>            \- The max number of instructions to consider hoisting loads over (the algorithm is quadratic over this number)
.HP
\fB\-instcombine\-maxarray\-size=\fR<uint>                 \- Maximum array size considered when doing a combine
.HP
\fB\-internalize\-public\-api\-file=\fR<filename>           \- A file containing list of symbol names to preserve
.HP
\fB\-internalize\-public\-api\-list=\fR<list>               \- A list of symbol names to preserve
.HP
\fB\-iterative\-counter\-promotion\fR                      \- Allow counter promotion across the whole loop nest.
.HP
\fB\-jit\-kind\fR                                         \- Choose underlying JIT kind.
.TP
=mcjit
\-   MCJIT
.TP
=orc\-mcjit
\-   Orc\-based MCJIT replacement
.TP
=orc\-lazy
\-   Orc\-based lazy JIT.
.HP
\fB\-join\-liveintervals\fR                               \- Coalesce copies (default=true)
.HP
\fB\-limit\-float\-precision=\fR<uint>                     \- Generate low\-precision inline sequences for some float libcalls
.HP
\fB\-load=\fR<pluginfilename>                            \- Load the specified plugin
.HP
\fB\-lto\-pass\-remarks\-output=\fR<filename>               \- Output filename for pass remarks
.HP
\fB\-march=\fR<string>                                   \- Architecture to generate assembly for (see \fB\-\-version\fR)
.HP
\fB\-mattr=\fR<a1,+a2,\-a3,...>                           \- Target specific attributes (\fB\-mattr\fR=\fI\,help\/\fR for details)
.HP
\fB\-max\-counter\-promotions=\fR<int>                     \- Max number of allowed counter promotions
.HP
\fB\-max\-counter\-promotions\-per\-loop=\fR<uint>           \- Max number counter promotions per loop to avoid increasing register pressure too much
.TP
\fB\-mcjit\-remote\-process=\fR<filename>                  \- Specify the filename of the process to launch for remote MCJIT execution.
If none is specified,
remote execution will be simulated in\-process.
.HP
\fB\-mcpu=\fR<cpu\-name>                                  \- Target a specific cpu type (\fB\-mcpu\fR=\fI\,help\/\fR for details)
.HP
\fB\-memop\-size\-large=\fR<uint>                          \- Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling.
.HP
\fB\-memop\-size\-range=\fR<string>                        \- Set the range of size in memory intrinsic calls to be profiled precisely, in a format of <start_val>:<end_val>
.HP
\fB\-merror\-missing\-parenthesis\fR                       \- Error for missing parenthesis around predicate registers
.HP
\fB\-merror\-noncontigious\-register\fR                    \- Error for register names that aren't contigious
.HP
\fB\-mfuture\-regs\fR                                     \- Enable future registers
.HP
\fB\-mips\-compact\-branches\fR                            \- MIPS Specific: Compact branch policy.
.TP
=never
\-   Do not use compact branches if possible.
.TP
=optimal
\-   Use compact branches where appropiate (default).
.TP
=always
\-   Always use compact branches if possible.
.HP
\fB\-mips16\-constant\-islands\fR                          \- Enable mips16 constant islands.
.HP
\fB\-mips16\-hard\-float\fR                                \- Enable mips16 hard float.
.HP
\fB\-mno\-compound\fR                                     \- Disable looking for compound instructions for Hexagon
.HP
\fB\-mno\-fixup\fR                                        \- Disable fixing up resolved relocations for Hexagon
.HP
\fB\-mno\-ldc1\-sdc1\fR                                    \- Expand double precision loads and stores to their single precision counterparts
.HP
\fB\-mno\-pairing\fR                                      \- Disable looking for duplex instructions for Hexagon
.HP
\fB\-mtriple=\fR<string>                                 \- Override target triple for module
.HP
\fB\-mwarn\-missing\-parenthesis\fR                        \- Warn for missing parenthesis around predicate registers
.HP
\fB\-mwarn\-noncontigious\-register\fR                     \- Warn for register names that arent contigious
.HP
\fB\-mwarn\-sign\-mismatch\fR                              \- Warn for mismatching a signed and unsigned value
.HP
\fB\-no\-discriminators\fR                                \- Disable generation of discriminator information.
.HP
\fB\-nvptx\-sched4reg\fR                                  \- NVPTX Specific: schedule for register pressue
.HP
\fB\-object\-cache\-dir=\fR<string>                        \- Directory to store cached object files (must be user writable)
.HP
\fB\-print\-after\-all\fR                                  \- Print IR after each pass
.HP
\fB\-print\-before\-all\fR                                 \- Print IR before each pass
.HP
\fB\-print\-machineinstrs=\fR<pass\-name>                  \- Print machine instrs
.HP
\fB\-r600\-ir\-structurize\fR                              \- Use StructurizeCFG IR pass
.HP
\fB\-rdf\-dump\fR                                         \-
.HP
\fB\-rdf\-limit=\fR<uint>                                 \-
.HP
\fB\-regalloc\fR                                         \- Register allocator to use
.TP
=pbqp
\-   PBQP register allocator
.TP
=greedy
\-   greedy register allocator
.TP
=fast
\-   fast register allocator
.TP
=basic
\-   basic register allocator
.TP
=default
\-   pick register allocator based on \fB\-O\fR option
.HP
\fB\-relocation\-model\fR                                 \- Choose relocation model
.TP
=static
\-   Non\-relocatable code
.TP
=pic
\-   Fully relocatable, position independent code
.TP
=dynamic\-no\-pic
\-   Relocatable external references, non\-relocatable code
.HP
\fB\-remote\-mcjit\fR                                     \- Execute MCJIT'ed code in a separate process.
.HP
\fB\-rewrite\-map\-file=\fR<filename>                      \- Symbol Rewrite Map
.HP
\fB\-rng\-seed=\fR<seed>                                  \- Seed for the random number generator
.HP
\fB\-safepoint\-ir\-verifier\-print\-only\fR                 \-
.HP
\fB\-sample\-profile\-check\-record\-coverage=\fR<N>         \- Emit a warning if less than N% of records in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-check\-sample\-coverage=\fR<N>         \- Emit a warning if less than N% of samples in the input profile are matched to the IR.
.HP
\fB\-sample\-profile\-inline\-hot\-threshold=\fR<N>          \- Inlined functions that account for more than N% of all samples collected in the parent function, will be inlined again.
.HP
\fB\-sample\-profile\-max\-propagate\-iterations=\fR<uint>   \- Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.
.HP
\fB\-simplify\-mir\fR                                     \- Leave out unnecessary information when printing MIR
.HP
\fB\-soft\-float\fR                                       \- Generate software floating point library calls
.TP
\fB\-speculative\-counter\-promotion\-max\-exiting=\fR<uint> \- The max number of exiting blocks of a loop to allow
speculative counter promotion
.TP
\fB\-speculative\-counter\-promotion\-to\-loop\fR            \- When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter
update can be further/iteratively promoted into an acyclic  region.
.HP
\fB\-stackmap\-version=\fR<int>                           \- Specify the stackmap encoding version (default = 3)
.HP
\fB\-static\-func\-full\-module\-prefix\fR                   \- Use full module build paths in the profile counter names for static functions.
.HP
\fB\-static\-func\-strip\-dirname\-prefix=\fR<uint>          \- Strip specified level of directory name from source path in the profile counter name for static functions.
.HP
\fB\-stats\fR                                            \- Enable statistics output from program (available with Asserts)
.HP
\fB\-stats\-json\fR                                       \- Display statistics as json data
.HP
\fB\-summary\-file=\fR<string>                            \- The summary file to use for function importing.
.HP
\fB\-threads=\fR<int>                                    \-
.HP
\fB\-time\-passes\fR                                      \- Time each pass, printing elapsed time for each on exit
.HP
\fB\-unfold\-element\-atomic\-memcpy\-max\-elements=\fR<uint> \- Maximum number of elements in atomic memcpy the optimizer is allowed to unfold
.HP
\fB\-verify\-debug\-info\fR                                \-
.HP
\fB\-verify\-dom\-info\fR                                  \- Verify dominator info (time consuming)
.HP
\fB\-verify\-loop\-info\fR                                 \- Verify loop info (time consuming)
.HP
\fB\-verify\-loop\-lcssa\fR                                \- Verify loop lcssa form (time consuming)
.HP
\fB\-verify\-machine\-dom\-info\fR                          \- Verify machine dominator info (time consuming)
.HP
\fB\-verify\-regalloc\fR                                  \- Verify during register allocation
.HP
\fB\-verify\-region\-info\fR                               \- Verify region info (time consuming)
.HP
\fB\-verify\-scev\fR                                      \- Verify ScalarEvolution's backedge taken counts (slow)
.HP
\fB\-verify\-scev\-maps\fR                                 \- Verify no dangling value in ScalarEvolution's ExprValueMap (slow)
.HP
\fB\-vp\-counters\-per\-site=\fR<number>                    \- The average number of profile counters allocated per value profiling site.
.HP
\fB\-vp\-static\-alloc\fR                                  \- Do static counter allocation for value profiler
.HP
\fB\-x86\-asm\-syntax\fR                                   \- Choose style of code to emit from X86 backend:
.TP
=att
\-   Emit AT&T\-style assembly
.TP
=intel
\-   Emit Intel\-style assembly
.PP
Generic Options:
.HP
\fB\-help\fR                                             \- Display available options (\fB\-help\-hidden\fR for more)
.HP
\fB\-help\-list\fR                                        \- Display list of available options (\fB\-help\-list\-hidden\fR for more)
.HP
\fB\-version\fR                                          \- Display the version of this program
.SH "SEE ALSO"
The full documentation for
.B lli
is maintained as a Texinfo manual.  If the
.B info
and
.B lli
programs are properly installed at your site, the command
.IP
.B info lli
.PP
should give you access to the complete manual.