.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.49.3. .TH MODULARIZE "1" "February 2024" "modularize 15" "User Commands" .SH NAME modularize \- manual page for modularize 15 .SH DESCRIPTION OVERVIEW: modularize. .PP USAGE: modularize [options] ... .PP OPTIONS: .PP Color Options: .HP \fB\-\-color\fR \- Use colors in output (default=autodetect) .PP General options: .HP \fB\-I\fR \- Include path for coverage check. .HP \fB\-\-aarch64\-neon\-syntax=\fR \- Choose style of NEON code to emit from AArch64 backend: .TP =generic \- Emit generic NEON assembly .TP =apple \- Emit Apple\-style NEON assembly .HP \fB\-\-aarch64\-use\-aa\fR \- Enable the use of AA during codegen. .HP \fB\-\-abort\-on\-max\-devirt\-iterations\-reached\fR \- Abort when the max iterations for devirtualization CGSCC repeat pass is reached .HP \fB\-\-addrsig\fR \- Emit an address\-significance table .HP \fB\-\-align\-loops=\fR \- Default alignment for loops .HP \fB\-\-allow\-ginsert\-as\-artifact\fR \- Allow G_INSERT to be considered an artifact. Hack around AMDGPU test infinite loops. .HP \fB\-\-amdgpu\-bypass\-slow\-div\fR \- Skip 64\-bit divide for dynamic 32\-bit values .HP \fB\-\-amdgpu\-disable\-loop\-alignment\fR \- Do not align and prefetch loops .HP \fB\-\-amdgpu\-dpp\-combine\fR \- Enable DPP combiner .HP \fB\-\-amdgpu\-dump\-hsa\-metadata\fR \- Dump AMDGPU HSA Metadata .HP \fB\-\-amdgpu\-enable\-merge\-m0\fR \- Merge and hoist M0 initializations .HP \fB\-\-amdgpu\-enable\-power\-sched\fR \- Enable scheduling to minimize mAI power bursts .HP \fB\-\-amdgpu\-igrouplp\fR \- Enable construction of Instruction Groups and their ordering for scheduling .HP \fB\-\-amdgpu\-promote\-alloca\-to\-vector\-limit=\fR \- Maximum byte size to consider promote alloca to vector .HP \fB\-\-amdgpu\-sdwa\-peephole\fR \- Enable SDWA peepholer .HP \fB\-\-amdgpu\-use\-aa\-in\-codegen\fR \- Enable the use of AA during codegen. .HP \fB\-\-amdgpu\-verify\-hsa\-metadata\fR \- Verify AMDGPU HSA Metadata .HP \fB\-\-amdgpu\-vgpr\-index\-mode\fR \- Use GPR indexing mode instead of movrel for vector indexing .HP \fB\-\-arm\-add\-build\-attributes\fR \- .HP \fB\-\-arm\-implicit\-it=\fR \- Allow conditional instructions outdside of an IT block .TP =always \- Accept in both ISAs, emit implicit ITs in Thumb .TP =never \- Warn in ARM, reject in Thumb .TP =arm \- Accept in ARM, reject in Thumb .TP =thumb \- Warn in ARM, emit implicit ITs in Thumb .HP \fB\-\-asm\-show\-inst\fR \- Emit internal instruction representation to assembly file .TP \fB\-\-atomic\-counter\-update\-promoted\fR \- Do counter update using atomic fetch add for promoted counters only .HP \fB\-\-atomic\-first\-counter\fR \- Use atomic fetch add for first counter in a function (usually the entry counter) .HP \fB\-\-basic\-block\-sections=\fR | labels | none> \- Emit basic blocks into separate sections .HP \fB\-\-block\-check\-header\-list\-only\fR \- Only warn if #include directives are inside extern or namespace blocks if the included header is in the header list. .HP \fB\-\-bounds\-checking\-single\-trap\fR \- Use one trap block per function .HP \fB\-\-cfg\-hide\-cold\-paths=\fR \- Hide blocks with relative frequency below the given value .HP \fB\-\-cfg\-hide\-deoptimize\-paths\fR \- .HP \fB\-\-cfg\-hide\-unreachable\-paths\fR \- .HP \fB\-\-code\-model=\fR \- Choose code model .TP =tiny \- Tiny code model .TP =small \- Small code model .TP =kernel \- Kernel code model .TP =medium \- Medium code model .TP =large \- Large code model .HP \fB\-\-cost\-kind=\fR \- Target cost kind .TP =throughput \- Reciprocal throughput .TP =latency \- Instruction latency .TP =code\-size \- Code size .TP =size\-latency \- Code size and latency .HP \fB\-\-coverage\-check\-only\fR \- Only do the coverage check. .HP \fB\-\-data\-sections\fR \- Emit data into separate sections .HP \fB\-\-debug\-entry\-values\fR \- Enable debug info for the debug entry values. .HP \fB\-\-debug\-info\-correlate\fR \- Use debug info to correlate profiles. .HP \fB\-\-debugger\-tune=\fR \- Tune debug info for a particular debugger .TP =gdb \- gdb .TP =lldb \- lldb .TP =dbx \- dbx .TP =sce \- SCE targets (e.g. PS4) .HP \fB\-\-debugify\-func\-limit=\fR \- Set max number of processed functions per pass. .HP \fB\-\-debugify\-level=\fR \- Kind of debug info to add .TP =locations \- Locations only .TP =location+variables \- Locations and Variables .HP \fB\-\-debugify\-quiet\fR \- Suppress verbose debugify output .HP \fB\-\-denormal\-fp\-math=\fR \- Select which denormal numbers the code is permitted to require .TP =ieee \- IEEE 754 denormal numbers .TP =preserve\-sign \- the sign of a flushed\-to\-zero number is preserved in the sign of 0 .TP =positive\-zero \- denormals are flushed to positive zero .HP \fB\-\-denormal\-fp\-math\-f32=\fR \- Select which denormal numbers the code is permitted to require for float .TP =ieee \- IEEE 754 denormal numbers .TP =preserve\-sign \- the sign of a flushed\-to\-zero number is preserved in the sign of 0 .TP =positive\-zero \- denormals are flushed to positive zero .HP \fB\-\-disable\-i2p\-p2i\-opt\fR \- Disables inttoptr/ptrtoint roundtrip optimization .HP \fB\-\-disable\-promote\-alloca\-to\-lds\fR \- Disable promote alloca to LDS .HP \fB\-\-disable\-promote\-alloca\-to\-vector\fR \- Disable promote alloca to vector .HP \fB\-\-disable\-tail\-calls\fR \- Never emit tail calls .HP \fB\-\-display\-file\-lists\fR \- Display lists of good files (no compile errors), problem files, and a combined list with problem files preceded by a '#'. .HP \fB\-\-do\-counter\-promotion\fR \- Do counter register promotion .HP \fB\-\-dot\-cfg\-mssa=\fR \- file name for generated dot file .HP \fB\-\-dwarf\-version=\fR \- Dwarf version .HP \fB\-\-dwarf64\fR \- Generate debugging info in the 64\-bit DWARF format .HP \fB\-\-emit\-call\-site\-info\fR \- Emit call site debug information, if debug information is enabled. .HP \fB\-\-emit\-dwarf\-unwind=\fR \- Whether to emit DWARF EH frame entries. .TP =always \- Always emit EH frame entries .TP =no\-compact\-unwind \- Only emit EH frame entries when compact unwind is not available .TP =default \- Use target platform default .HP \fB\-\-emscripten\-cxx\-exceptions\-allowed=\fR \- The list of function names in which Emscripten\-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_ALLOWED options) .HP \fB\-\-emulated\-tls\fR \- Use emulated TLS model .HP \fB\-\-enable\-approx\-func\-fp\-math\fR \- Enable FP math optimizations that assume approx func .HP \fB\-\-enable\-cse\-in\-irtranslator\fR \- Should enable CSE in irtranslator .HP \fB\-\-enable\-cse\-in\-legalizer\fR \- Should enable CSE in Legalizer .HP \fB\-\-enable\-emscripten\-cxx\-exceptions\fR \- WebAssembly Emscripten\-style exception handling .HP \fB\-\-enable\-emscripten\-sjlj\fR \- WebAssembly Emscripten\-style setjmp/longjmp handling .HP \fB\-\-enable\-gvn\-hoist\fR \- Enable the GVN hoisting pass (default = off) .HP \fB\-\-enable\-gvn\-memdep\fR \- .HP \fB\-\-enable\-gvn\-sink\fR \- Enable the GVN sinking pass (default = off) .HP \fB\-\-enable\-jmc\-instrument\fR \- Instrument functions with a call to __CheckForDebuggerJustMyCode .HP \fB\-\-enable\-load\-in\-loop\-pre\fR \- .HP \fB\-\-enable\-load\-pre\fR \- .HP \fB\-\-enable\-loop\-simplifycfg\-term\-folding\fR \- .HP \fB\-\-enable\-name\-compression\fR \- Enable name/filename string compression .HP \fB\-\-enable\-no\-infs\-fp\-math\fR \- Enable FP math optimizations that assume no +\-Infs .HP \fB\-\-enable\-no\-nans\-fp\-math\fR \- Enable FP math optimizations that assume no NaNs .HP \fB\-\-enable\-no\-signed\-zeros\-fp\-math\fR \- Enable FP math optimizations that assume the sign of 0 is insignificant .HP \fB\-\-enable\-no\-trapping\-fp\-math\fR \- Enable setting the FP exceptions build attribute not to use exceptions .HP \fB\-\-enable\-split\-backedge\-in\-load\-pre\fR \- .HP \fB\-\-enable\-unsafe\-fp\-math\fR \- Enable optimizations that may decrease FP precision .HP \fB\-\-exception\-model=\fR \- exception model .TP =default \- default exception handling model .TP =dwarf \- DWARF\-like CFI based exception handling .TP =sjlj \- SjLj exception handling .TP =arm \- ARM EHABI exceptions .TP =wineh \- Windows exception model .TP =wasm \- WebAssembly exception handling .HP \fB\-\-execute\-concurrency=\fR \- The number of threads used to process all files in parallel. Set to 0 for hardware concurrency. This flag only applies to all\-TUs. .HP \fB\-\-executor=\fR \- The name of the executor to use. .HP \fB\-\-experimental\-debug\-variable\-locations\fR \- Use experimental new value\-tracking variable locations .HP \fB\-\-fatal\-warnings\fR \- Treat warnings as errors .HP \fB\-\-filetype=\fR \- Choose a file type (not all types are supported by all targets): .TP =asm \- Emit an assembly ('.s') file .TP =obj \- Emit a native object ('.o') file .TP =null \- Emit nothing, for performance testing .HP \fB\-\-filter=\fR \- Only process files that match this filter. This flag only applies to all\-TUs. .HP \fB\-\-float\-abi=\fR \- Choose float ABI type .TP =default \- Target default float ABI type .TP =soft \- Soft float ABI (implied by \fB\-soft\-float\fR) .TP =hard \- Hard float ABI (uses FP registers) .HP \fB\-\-force\-dwarf\-frame\-section\fR \- Always emit a debug frame section. .HP \fB\-\-fp\-contract=\fR \- Enable aggressive formation of fused FP ops .TP =fast \- Fuse FP ops whenever profitable .TP =on \- Only fuse 'blessed' FP ops. .TP =off \- Only fuse FP ops when the result won't be affected. .HP \fB\-\-frame\-pointer=\fR \- Specify frame pointer elimination optimization .TP =all \- Disable frame pointer elimination .TP =non\-leaf \- Disable frame pointer elimination for non\-leaf frame .TP =none \- Enable frame pointer elimination .TP \fB\-\-fs\-profile\-debug\-bw\-threshold=\fR \- Only show debug message if the source branch weight is greater than this value. .HP \fB\-\-fs\-profile\-debug\-prob\-diff\-threshold=\fR \- Only show debug message if the branch probility is greater than this value (in percentage). .HP \fB\-\-function\-sections\fR \- Emit functions into separate sections .HP \fB\-\-generate\-merged\-base\-profiles\fR \- When generating nested context\-sensitive profiles, always generate extra base profile for function with all its context profiles merged into it. .TP \fB\-\-gpsize=\fR \- Global Pointer Addressing Size. The default size is 8. .HP \fB\-\-hash\-based\-counter\-split\fR \- Rename counter variable of a comdat function based on cfg hash .HP \fB\-\-hot\-cold\-split\fR \- Enable hot\-cold splitting pass .HP \fB\-\-ignore\-xcoff\-visibility\fR \- Not emit the visibility attribute for asm in AIX OS or give all symbols 'unspecified' visibility in XCOFF object file .HP \fB\-\-import\-all\-index\fR \- Import all external functions in index. .HP \fB\-\-incremental\-linker\-compatible\fR \- When used with filetype=obj, emit an object file which can be used with an incremental linker .HP \fB\-\-instcombine\-code\-sinking\fR \- Enable code sinking .HP \fB\-\-instcombine\-guard\-widening\-window=\fR \- How wide an instruction window to bypass looking for another guard .HP \fB\-\-instcombine\-max\-iterations=\fR \- Limit the maximum number of instruction combining iterations .HP \fB\-\-instcombine\-max\-num\-phis=\fR \- Maximum number phis to handle in intptr/ptrint folding .HP \fB\-\-instcombine\-max\-sink\-users=\fR \- Maximum number of undroppable users for instruction sinking .HP \fB\-\-instcombine\-maxarray\-size=\fR \- Maximum array size considered when doing a combine .HP \fB\-\-instcombine\-negator\-enabled\fR \- Should we attempt to sink negations? .HP \fB\-\-instcombine\-negator\-max\-depth=\fR \- What is the maximal lookup depth when trying to check for viability of negation sinking. .HP \fB\-\-instrprof\-atomic\-counter\-update\-all\fR \- Make all profile counter updates atomic (for testing only) .HP \fB\-\-internalize\-public\-api\-file=\fR \- A file containing list of symbol names to preserve .HP \fB\-\-internalize\-public\-api\-list=\fR \- A list of symbol names to preserve .HP \fB\-\-iterative\-counter\-promotion\fR \- Allow counter promotion across the whole loop nest. .HP \fB\-\-lower\-global\-dtors\-via\-cxa\-atexit\fR \- Lower llvm.global_dtors (global destructors) via __cxa_atexit .HP \fB\-\-lto\-embed\-bitcode=\fR \- Embed LLVM bitcode in object files produced by LTO .TP =none \- Do not embed .TP =optimized \- Embed after all optimization passes .TP =post\-merge\-pre\-opt \- Embed post merge, but before optimizations .HP \fB\-\-lto\-pass\-remarks\-filter=\fR \- Only record optimization remarks from passes whose names match the given regular expression .HP \fB\-\-lto\-pass\-remarks\-format=\fR \- The format used for serializing remarks (default: YAML) .HP \fB\-\-lto\-pass\-remarks\-output=\fR \- Output filename for pass remarks .HP \fB\-\-march=\fR \- Architecture to generate code for (see \fB\-\-version\fR) .HP \fB\-\-matrix\-default\-layout=\fR \- Sets the default matrix layout .TP =column\-major \- Use column\-major layout .TP =row\-major \- Use row\-major layout .HP \fB\-\-mattr=\fR \- Target specific attributes (\fB\-mattr\fR=\fI\,help\/\fR for details) .HP \fB\-\-max\-counter\-promotions=\fR \- Max number of allowed counter promotions .HP \fB\-\-max\-counter\-promotions\-per\-loop=\fR \- Max number counter promotions per loop to avoid increasing register pressure too much .HP \fB\-\-mc\-relax\-all\fR \- When used with filetype=obj, relax all fixups in the emitted object file .HP \fB\-\-mcabac\fR \- tbd .HP \fB\-\-mcpu=\fR \- Target a specific cpu type (\fB\-mcpu\fR=\fI\,help\/\fR for details) .HP \fB\-\-meabi=\fR \- Set EABI type (default depends on triple): .TP =default \- Triple default EABI version .TP =4 \- EABI version 4 .TP =5 \- EABI version 5 .TP =gnu \- EABI GNU .HP \fB\-\-merror\-missing\-parenthesis\fR \- Error for missing parenthesis around predicate registers .HP \fB\-\-merror\-noncontigious\-register\fR \- Error for register names that aren't contigious .HP \fB\-\-mhvx\fR \- Enable Hexagon Vector eXtensions .HP \fB\-\-mhvx=\fR \- Enable Hexagon Vector eXtensions .TP =v60 \- Build for HVX v60 .TP =v62 \- Build for HVX v62 .TP =v65 \- Build for HVX v65 .TP =v66 \- Build for HVX v66 .TP =v67 \- Build for HVX v67 .TP =v68 \- Build for HVX v68 .TP =v69 \- Build for HVX v69 .HP \fB\-\-mips\-compact\-branches=\fR \- MIPS Specific: Compact branch policy. .TP =never \- Do not use compact branches if possible. .TP =optimal \- Use compact branches where appropriate (default). .TP =always \- Always use compact branches if possible. .HP \fB\-\-mips16\-constant\-islands\fR \- Enable mips16 constant islands. .HP \fB\-\-mips16\-hard\-float\fR \- Enable mips16 hard float. .HP \fB\-\-mir\-strip\-debugify\-only\fR \- Should mir\-strip\-debug only strip debug info from debugified modules by default .HP \fB\-\-misexpect\-tolerance=\fR \- Prevents emiting diagnostics when profile counts are within N% of the threshold.. .HP \fB\-\-mno\-compound\fR \- Disable looking for compound instructions for Hexagon .HP \fB\-\-mno\-fixup\fR \- Disable fixing up resolved relocations for Hexagon .HP \fB\-\-mno\-ldc1\-sdc1\fR \- Expand double precision loads and stores to their single precision counterparts .HP \fB\-\-mno\-pairing\fR \- Disable looking for duplex instructions for Hexagon .HP \fB\-\-module\-map\-path=\fR \- Turn on module map output and specify output path or file name. If no path is specified and if prefix option is specified, use prefix for file path. .HP \fB\-\-mwarn\-missing\-parenthesis\fR \- Warn for missing parenthesis around predicate registers .HP \fB\-\-mwarn\-noncontigious\-register\fR \- Warn for register names that arent contigious .HP \fB\-\-mwarn\-sign\-mismatch\fR \- Warn for mismatching a signed and unsigned value .HP \fB\-\-no\-coverage\-check\fR \- Don't do the coverage check. .HP \fB\-\-no\-deprecated\-warn\fR \- Suppress all deprecated warnings .HP \fB\-\-no\-discriminators\fR \- Disable generation of discriminator information. .HP \fB\-\-no\-type\-check\fR \- Suppress type errors (Wasm) .HP \fB\-\-no\-warn\fR \- Suppress all warnings .HP \fB\-\-no\-xray\-index\fR \- Don't emit xray_fn_idx section .HP \fB\-\-nozero\-initialized\-in\-bss\fR \- Don't place zero\-initialized symbols into bss section .HP \fB\-\-nvptx\-sched4reg\fR \- NVPTX Specific: schedule for register pressue .HP \fB\-\-opaque\-pointers\fR \- Use opaque pointers .HP \fB\-\-poison\-checking\-function\-local\fR \- Check that returns are non\-poison (for testing) .HP \fB\-\-prefix=\fR \- Prepend header file paths with this prefix. If not specified, the files are considered to be relative to the header list file. .HP \fB\-\-print\-pipeline\-passes\fR \- Print a '\-passes' compatible string describing the pipeline (best\-effort only). .TP \fB\-\-problem\-files\-list=\fR \- List of files with compilation or modularization problems for assistant mode. This will be excluded. .HP \fB\-\-r600\-ir\-structurize\fR \- Use StructurizeCFG IR pass .HP \fB\-\-rdf\-dump\fR \- .HP \fB\-\-rdf\-limit=\fR \- .HP \fB\-\-relax\-elf\-relocations\fR \- Emit GOTPCRELX/REX_GOTPCRELX instead of GOTPCREL on x86\-64 ELF .HP \fB\-\-relocation\-model=\fR \- Choose relocation model .TP =static \- Non\-relocatable code .TP =pic \- Fully relocatable, position independent code .TP =dynamic\-no\-pic \- Relocatable external references, non\-relocatable code .TP =ropi \- Code and read\-only data relocatable, accessed PC\-relative .TP =rwpi \- Read\-write data relocatable, accessed relative to static base .TP =ropi\-rwpi \- Combination of ropi and rwpi .HP \fB\-\-root\-module=\fR \- Specify the name of the root module. .HP \fB\-\-runtime\-counter\-relocation\fR \- Enable relocating counters at runtime. .HP \fB\-\-safepoint\-ir\-verifier\-print\-only\fR \- .HP \fB\-\-sample\-profile\-check\-record\-coverage=\fR \- Emit a warning if less than N% of records in the input profile are matched to the IR. .HP \fB\-\-sample\-profile\-check\-sample\-coverage=\fR \- Emit a warning if less than N% of samples in the input profile are matched to the IR. .HP \fB\-\-sample\-profile\-max\-propagate\-iterations=\fR \- Maximum number of iterations to go through when propagating sample block/edge weights through the CFG. .HP \fB\-\-skip\-ret\-exit\-block\fR \- Suppress counter promotion if exit blocks contain ret. .TP \fB\-\-speculative\-counter\-promotion\-max\-exiting=\fR \- The max number of exiting blocks of a loop to allow speculative counter promotion .TP \fB\-\-speculative\-counter\-promotion\-to\-loop\fR \- When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region. .HP \fB\-\-split\-machine\-functions\fR \- Split out cold basic blocks from machine functions based on profile information .HP \fB\-\-stack\-size\-section\fR \- Emit a section containing stack size metadata .HP \fB\-\-stack\-symbol\-ordering\fR \- Order local stack symbols. .HP \fB\-\-stackrealign\fR \- Force align the stack to the minimum alignment .HP \fB\-\-strict\-dwarf\fR \- use strict dwarf .HP \fB\-\-summary\-file=\fR \- The summary file to use for function importing. .TP \fB\-\-sve\-tail\-folding=\fR \- Control the use of vectorisation using tail\-folding for SVE: disabled No loop types will vectorize using tail\-folding default Uses the default tail\-folding settings for the target CPU all All legal loop types will vectorize using tail\-folding simple Use tail\-folding for simple loops (not reductions or recurrences) reductions Use tail\-folding for loops containing reductions recurrences Use tail\-folding for loops containing first order recurrences .HP \fB\-\-swift\-async\-fp=\fR \- Determine when the Swift async frame pointer should be set .TP =auto \- Determine based on deployment target .TP =always \- Always set the bit .TP =never \- Never set the bit .HP \fB\-\-tail\-predication=\fR \- MVE tail\-predication pass options .TP =disabled \- Don't tail\-predicate loops .TP =enabled\-no\-reductions \- Enable tail\-predication, but not for reduction loops .TP =enabled \- Enable tail\-predication, including reduction loops .TP =force\-enabled\-no\-reductions \- Enable tail\-predication, but not for reduction loops, and force this which might be unsafe .TP =force\-enabled \- Enable tail\-predication, including reduction loops, and force this which might be unsafe .HP \fB\-\-tailcallopt\fR \- Turn fastcc calls into tail calls by (potentially) changing ABI. .HP \fB\-\-thinlto\-assume\-merged\fR \- Assume the input has already undergone ThinLTO function importing and the other pre\-optimization pipeline changes. .HP \fB\-\-thread\-model=\fR \- Choose threading model .TP =posix \- POSIX thread model .TP =single \- Single thread model .HP \fB\-\-threads=\fR \- .HP \fB\-\-tls\-size=\fR \- Bit size of immediate TLS offsets .HP \fB\-\-type\-based\-intrinsic\-cost\fR \- Calculate intrinsics cost based only on argument types .HP \fB\-\-unique\-basic\-block\-section\-names\fR \- Give unique names to every basic block section .HP \fB\-\-unique\-section\-names\fR \- Give unique names to every section .HP \fB\-\-use\-ctors\fR \- Use .ctors instead of .init_array. .HP \fB\-\-vec\-extabi\fR \- Enable the AIX Extended Altivec ABI. .HP \fB\-\-verify\-region\-info\fR \- Verify region info (time consuming) .HP \fB\-\-vp\-counters\-per\-site=\fR \- The average number of profile counters allocated per value profiling site. .HP \fB\-\-vp\-static\-alloc\fR \- Do static counter allocation for value profiler .HP \fB\-\-wasm\-enable\-eh\fR \- WebAssembly exception handling .HP \fB\-\-wasm\-enable\-sjlj\fR \- WebAssembly setjmp/longjmp handling .TP \fB\-\-x86\-align\-branch=\fR \- Specify types of branches to align (plus separated list of types): jcc indicates conditional jumps fused indicates fused conditional jumps jmp indicates direct unconditional jumps call indicates direct and indirect calls ret indicates rets indirect indicates indirect unconditional jumps .HP \fB\-\-x86\-align\-branch\-boundary=\fR \- Control how the assembler should align branches with NOP. If the boundary's size is not 0, it should be a power of 2 and no less than 32. Branches will be aligned to prevent from being across or against the boundary of specified size. The default value 0 does not align branches. .TP \fB\-\-x86\-branches\-within\-32B\-boundaries\fR \- Align selected instructions to mitigate negative performance impact of Intel's micro code update for errata skx102. May break assumptions about labels corresponding to particular instructions, and should be used with caution. .HP \fB\-\-x86\-pad\-max\-prefix\-size=\fR \- Maximum number of prefixes to use for padding .HP \fB\-\-xcoff\-traceback\-table\fR \- Emit the XCOFF traceback table .PP Generic Options: .HP \fB\-\-help\fR \- Display available options (\fB\-\-help\-hidden\fR for more) .HP \fB\-\-help\-list\fR \- Display list of available options (\fB\-\-help\-list\-hidden\fR for more) .HP \fB\-\-version\fR \- Display the version of this program .PP Polly Options: Configure the polly loop optimizer .HP \fB\-\-polly\fR \- Enable the polly optimizer (with \fB\-O1\fR, \fB\-O2\fR or \fB\-O3\fR) .HP \fB\-\-polly\-2nd\-level\-tiling\fR \- Enable a 2nd level loop of loop tiling .HP \fB\-\-polly\-ast\-print\-accesses\fR \- Print memory access functions .HP \fB\-\-polly\-context=\fR \- Provide additional constraints on the context parameters .HP \fB\-\-polly\-dce\-precise\-steps=\fR \- The number of precise steps between two approximating iterations. (A value of \fB\-1\fR schedules another approximation stage before the actual dead code elimination. .HP \fB\-\-polly\-delicm\-max\-ops=\fR \- Maximum number of isl operations to invest for lifetime analysis; 0=no limit .HP \fB\-\-polly\-detect\-full\-functions\fR \- Allow the detection of full functions .HP \fB\-\-polly\-dump\-after\fR \- Dump module after Polly transformations into a file suffixed with "\-after" .HP \fB\-\-polly\-dump\-after\-file=\fR \- Dump module after Polly transformations to the given file .HP \fB\-\-polly\-dump\-before\fR \- Dump module before Polly transformations into a file suffixed with "\-before" .HP \fB\-\-polly\-dump\-before\-file=\fR \- Dump module before Polly transformations to the given file .HP \fB\-\-polly\-enable\-simplify\fR \- Simplify SCoP after optimizations .HP \fB\-\-polly\-ignore\-func=\fR \- Ignore functions that match a regex. Multiple regexes can be comma separated. Scop detection will ignore all functions that match ANY of the regexes provided. .HP \fB\-\-polly\-isl\-arg=\fR \- Option passed to ISL .HP \fB\-\-polly\-on\-isl\-error\-abort\fR \- Abort if an isl error is encountered .HP \fB\-\-polly\-only\-func=\fR \- Only run on functions that match a regex. Multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes provided. .HP \fB\-\-polly\-only\-region=\fR \- Only run on certain regions (The provided identifier must appear in the name of the region's entry block .HP \fB\-\-polly\-only\-scop\-detection\fR \- Only run scop detection, but no other optimizations .HP \fB\-\-polly\-optimized\-scops\fR \- Polly \- Dump polyhedral description of Scops optimized with the isl scheduling optimizer and the set of post\-scheduling transformations is applied on the schedule tree .HP \fB\-\-polly\-parallel\fR \- Generate thread parallel code (isl codegen only) .HP \fB\-\-polly\-parallel\-force\fR \- Force generation of thread parallel code ignoring any cost model .HP \fB\-\-polly\-pattern\-matching\-based\-opts\fR \- Perform optimizations based on pattern matching .HP \fB\-\-polly\-postopts\fR \- Apply post\-rescheduling optimizations such as tiling (requires \fB\-polly\-reschedule\fR) .HP \fB\-\-polly\-pragma\-based\-opts\fR \- Apply user\-directed transformation from metadata .HP \fB\-\-polly\-pragma\-ignore\-depcheck\fR \- Skip the dependency check for pragma\-based transformations .HP \fB\-\-polly\-process\-unprofitable\fR \- Process scops that are unlikely to benefit from Polly optimizations. .HP \fB\-\-polly\-register\-tiling\fR \- Enable register tiling .HP \fB\-\-polly\-report\fR \- Print information about the activities of Polly .HP \fB\-\-polly\-reschedule\fR \- Optimize SCoPs using ISL .HP \fB\-\-polly\-show\fR \- Highlight the code regions that will be optimized in a (CFG BBs and LLVM\-IR instructions) .HP \fB\-\-polly\-show\-only\fR \- Highlight the code regions that will be optimized in a (CFG only BBs) .HP \fB\-\-polly\-stmt\-granularity=\fR \- Algorithm to use for splitting basic blocks into multiple statements .TP =bb \- One statement per basic block .TP =scalar\-indep \- Scalar independence heuristic .TP =store \- Store\-level granularity .HP \fB\-\-polly\-target=\fR \- The hardware to target .TP =cpu \- generate CPU code .HP \fB\-\-polly\-tiling\fR \- Enable loop tiling .HP \fB\-\-polly\-vectorizer=\fR \- Select the vectorization strategy .TP =none \- No Vectorization .TP =polly \- Polly internal vectorizer .TP =stripmine \- Strip\-mine outer loops for the loop\-vectorizer to trigger