.\" $Id: lotrs.3,v 1.2 2002/08/06 14:17:24 pnt Exp $ .\" @(#)lotrs.l 0.0 90/22/08 UPMC; Author: Frederic Petrot .if t \{\ .XS \n% .ti 0.2i lotrs .XE .XS2 \n% .ti 0.2i lotrs .XE2 \} .TH LOTRS 3 "August 6, 2002" "ASIM/LIP6" "MBK LOGICAL STRUCTURE DEFINITIONS" .SH NAME lotrs \- mbk logical transistor .SH DESCRIPTION The \fBlotrs\fP is used to describe a logical transistor. It is mostly used to describe leaf cells in terms of transistors interconnections, and as a result of layout extractions. Since the only target technology is CMOS, only NMOS and PMOS transistors are used. .LP The declarations needed to work on \fBlotrs\fP are available in the header file \fI"/labo/include/mlo.h"\fP. .LP The following C structure supports the description of the logical transistor : .RS .nf .if n \{\ .ft B \} .if t \{\ .ft CR \} .ta 3n 20n 30n typedef struct lotrs { struct lotrs \(**NEXT; struct locon \(**DRAIN; struct locon \(**GRID; struct locon \(**SOURCE; struct locon \(**BULK; char \(**TRNAME; long X,Y; unsigned short WIDTH, LENGTH; unsigned short PS, PD; unsigned short XS, XD; char TYPE; struct ptype \(**USER; } lotrs_list; .ft R .fi .RE .TP 20 \fINEXT\fP Pointer to the next \fBlotrs\fP of the list. .TP \fIDRAIN\fP Pointer to the drain connector of the transistor. This connector is, of course unique. See \fBlocon\fP(3) for details. .TP \fIGRID\fP Pointer to the grid connector of the transistor. This connector is, of course unique. See \fBlocon\fP(3) for details. .TP \fISOURCE\fP Pointer to the source connector of the transistor. This connector is, of course unique. See \fBlocon\fP(3) for details. .TP \fIBULK\fP Pointer to the bulk connector of the transistor. This connector is, of course unique. See \fBlocon\fP(3) for details. .TP \fITRNAME\fP Transistor instance name .TP \fIX, Y\fP Coordinates of the transistor in a layout. These informations have sens only if the transistor netlist is the result of a layout extraction. They are otherwise set to zero. These coordinates are given in micron times the scale factor \fBSCALE_X\fP, since the extracted view is technology dependant. .TP \fIWIDTH, LENGTH\fP Respectivly width and length of the transistor grid. .TP \fIPS, PD\fP Respectivly perimeter of the source and drain, in micron times the scale factor \fBSCALE_X\fP. .TP \fIXS, XD\fP These values are needed to compute respectivly the source and drain areas. Let \fIAs\fP be the source area in square microns, and \fIWidth\fP be the transistor grid width in micron, then \fIlotrs->XS = As / Width * SCALE_X\fP .TP \fITYPE\fP Canal type of the transistor. Six legal values are available : .RS .TP 20 \fBTRANSN\fP N type MOS transistor .TP \fBTRANSP\fP P type MOS transistor .TP \fBTRANSN_FAST\fP High speed N type MOS transistor .TP \fBTRANSP_FAST\fP High speed P type MOS transistor .TP \fBTRANSN_HVIO\fP Low Leakage N type MOS transistor .TP \fBTRANSP_HVIO\fP Low Leakage P type MOS transistor .RE .TP \fIUSER\fP Pointer to a ptype list, see \fBptype\fP(3) for details, that is a general purpose pointer used to share informations on the transistor. .TP Remark : In integrated techniques, NMOS transistor bulk for digital circuits is always set to ground, and PMOS transistor bulk for digital circuits is always set to positive supply. .SH SEE ALSO .BR mbk (1), .BR addlotrs (3), .BR dellotrs (3), .BR locon (3), .BR lofig (3), .BR ptype (3). .so buster/alliance/alc_bug_report.1.en.gz