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.TH "GENLIB_MACRO" "3" "30 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual"

.SH NAME
GENLIB_MACRO \- Interface with all MACRO generators.
.SH SYNOPSIS
.sp
\fB#include  <genlib.h>
.sp
void GENLIB_MACRO (long \fIfunction\fB, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB, long \fIregNumber\fB, char *\fIconstVal\fB);
\fR
.SH "DESCRIPTION"
.PP
The \fBGENLIB_MACRO()\fR fonction call is the generic interface to
all \fBgenlib\fR macro generators. As all generators do not have the
sames arguments it takes a variable number of arguments.
.PP
Arguments are of two kinds :
.TP 0.2i
\(bu
Mandatory arguments : those arguments must always be
supplied. They represents the minimal set of common arguments for
all macro-generators. Mandatory arguments comme firts in the
arguments list.
.TP 0.2i
\(bu
Optional arguments : arguments specifics to a
macro-generator or a class of macro-generators.
.SS "ARGUMENTS"
.TP 3
1. 
long  \fIfunction\fR : (mandatory) specify which macro-generator
is to be invoked. For example, to create a two entry multiplexer
gives GENLIB_MUX2\&.
.TP 3
2. 
char* \fImodelname\fR : (mandatory) specify the name of the model
to be generated. For example :
"model_mux2_32bits"\&.
.TP 3
3. 
long  \fIflags\fR : (mandatory) tells which views are to be
generated. It is a logical combination of the following values :
(\fBORed\fR)
.RS
.TP 3
1. 
F_PLACE : generate physical view (placement only).
.TP 3
2. 
F_BEHAV : generate behavioral view (\fBVHDL\fR view).
.TP 3
3. 
F_LSB_FIRST : the terminal of index zero is matched
to the LSB, thus a 32 bits vector will be written :
"signal[31:0]"\&.
.TP 3
4. 
F_MSB_FIRST : the terminal of index zero is matched
to the MSB, thus a 32 bits vector will be written :
"signal[0:31]" (aka. IBM notation).
.RE
.TP 3
4. 
long  \fIN\fR : (mandatory) width of the model's bus to be
generated.
.TP 3
5. 
long  \fIdrive\fR : (optional) output power drive.
.TP 3
6. 
long  \fIregNumber\fR : (optional) number of registers or depth
of for a FIFO macro-generator.
.TP 3
7. 
char* \fIconstval\fR : (optional) a character string holding a
constant. For example : "0xFFFF0000"\&.
.SS "AVAILABLE MACRO-GENERATORS"
.PP
.TP 0.2i
\(bu
Inverters and Buffers :
.RS
.TP 0.2i
\(bu
\fBDPGEN_INV\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_BUFF\fR(3)
.RE
.TP 0.2i
\(bu
Boolean Operators :
.RS
.TP 0.2i
\(bu
\fBDPGEN_NAND2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_NAND3\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_NAND4\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_AND2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_AND3\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_AND4\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_NOR2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_NOR3\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_NOR4\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_OR2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_OR3\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_OR4\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_XOR2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_XNOR2\fR(3)
.RE
.TP 0.2i
\(bu
Multiplexers and Tristates :
.RS
.TP 0.2i
\(bu
\fBDPGEN_NMUX2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_MUX2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_NBUSE\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_BUSE\fR(3)
.RE
.TP 0.2i
\(bu
Programmable Masks :
.RS
.TP 0.2i
\(bu
\fBDPGEN_NAND2MASK\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_NOR2MASK\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_XNOR2MASK\fR(3)
.RE
.TP 0.2i
\(bu
Arithmetics Operators :
.RS
.TP 0.2i
\(bu
\fBDPGEN_ADSB2F\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_SHIFT\fR(3)
.RE
.TP 0.2i
\(bu
Miscellaneous :
.RS
.TP 0.2i
\(bu
\fBDPGEN_NUL\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_CONST\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_ROM2\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_ROM4\fR(3)
.RE
.TP 0.2i
\(bu
Registers :
.RS
.TP 0.2i
\(bu
\fBDPGEN_RF1\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_RF1R0\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_FIFO\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_RF1D\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_RF1DR0\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_DFF\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_DFFT\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_SFF\fR(3)
.TP 0.2i
\(bu
\fBDPGEN_SFFT\fR(3)
.RE
.SH "SEE ALSO"
.PP
\fBmbk\fR(1),