.TH PDBG "8" "October 2017" "pdbg" "System Administration Utilities" .SH NAME pdbg \- PowerPC FSI Debugger .SH SYNOPSIS .B pdbg [options] command ... .SH DESCRIPTION .B pdbg is a simple application to allow debugging of the host POWER processors from the BMC. It works in a similar way to JTAG programmers for embedded system development in that it allows you to access GPRs, SPRs and system memory. A remote gdb server is under development to allow integration with standard debugging tools. .SH OPTIONS .TP .B -p \fIprocessor-id\fP, --processor=\fIprocessor-id\fP .TP .B -c \fIchiplet-id\fP, --chip=\fIchiplet-id\fP .TP .B -t \fIthread\fP, --thread=\fIthread\fP .TP .B -a, --all Run command on all possible processors/chips/threads (default) .TP .B -b \fIbackend\fP, --backend=\fIbackend\fP Several backends are supported depending on which system you are using : .RS .IP fsi An experimental backend that uses bit-banging to access the host processor via the FSI bus. .IP i2c The P8 only backend which goes via I2C. .IP kernel The default backend which goes the kernel FSI driver. .RE .TP .B -d \fIbackend-device\fP, --device=\fIbackend-device\fP For I2C the device node used by the backend to access the bus. .br For FSI the system board type, one of p8 or p9w .br Defaults to \fI\,/dev/i2c4\/\fP for I2C .TP .B -s \fIbackend-device-address\fP, --slave-address=\fIbackend-device-address\fP Device slave address to use for the backend. Not used by FSI and defaults to 0x50 for I2C. .TP .B -V, --version .TP .B -h, --help .RE .SH COMMANDS .TP .B getcfam \fIaddress\fP .TP .B putcfam \fIaddress\fP \fIvalue\fP [\fImask\fP] .TP .B getscom \fIaddress\fP .TP .B putscom \fIaddress\fP \fIvalue\fP [\fImask\fP] .TP .B getmem \fIaddress\fP \fIcount\fP .TP .B putmem \fIaddress\fP .TP .B getvmem \fIvirtual address\fP .TP .B getgpr \fIgpr\fP .TP .B putgpr \fIgpr\fP \fIvalue\fP .TP .B getnia .TP .B putnia \fIvalue\fP .TP .B getspr \fIspr\fP .TP .B putspr \fIspr\fP \fIvalue\fP .TP .B start .TP .B step \fIcount\fP .TP .B stop .TP .B threadstatus .TP .B probe .RE .SH EXAMPLES Probe chip/processor/thread numbers : .PP .B pdbg -a probe Read SCOM register : .PP .B pdbg -a getscom 0xf000f Write SCOM register on secondary processor : .PP .B pdbg -p1 putscom 0x8013c02 0x0 Get thread status : .PP .B pdbg -a threadstatus Stop thread execution on thread 0-4 of processor 0 core/chip 22 : .PP .B pdbg -p0 -c22 -t0 -t1 -t2 -t3 stop .br .B pdbg -p0 -c22 -t0 -t1 -t2 -t3 threadstatus Read GPR on thread 0 of processor 0 core/chip 22 : .PP .B pdbg -p0 -c22 -t0 getgpr 2 Read SPR 8 (LR) on thread 0 of processor 0 core/chip 22 : .PP .B pdbg -p0 -c22 -t0 getspr 8 Restart thread 0-4 execution on processor 0 core/chip 22 : .PP .B pdbg -p0 -c22 -t0 -t1 -t2 -t3 start .br .B pdbg -p0 -c22 -t0 -t1 -t2 -t3 threadstatus Hardware Trace Macro : .PP .B pdbg -b host -d p9 -a htm_trace .br [allow test to run] .br .B pdbg -b host -d p9 -a htm_analyse .SH REPORTING BUGS Report bugs at https://github.com/open-power/pdbg/issues .SH AUTHOR This manual page was written by Frédéric Bonnard , for the Debian GNU/Linux system (but may be used by others).